Paul Burton 4f9226b403 MIPS: Preserve Config implementation-defined bits ... The coprocessor 0 Config register includes 9 implementation defined bits, which in some processors do things like enable write combining or other functionality. We ought not to wipe them to 0 during boot. Rather than doing so, preserve their value & only clear the bits standardised by the MIPS architecture. Signed-off-by: Paul Burton <paul.burton@imgtec.com>		2016-09-21 15:04:04 +02:00
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mips32	MIPS: unify CPU code in arch/mips/cpu/	2015-01-30 14:19:58 +01:00
mips64	MIPS: unify CPU code in arch/mips/cpu/	2015-01-30 14:19:58 +01:00
cpu.c	MIPS: Probe cache line sizes once during boot	2016-09-21 15:04:04 +02:00
interrupts.c	MIPS: unify CPU code in arch/mips/cpu/	2015-01-30 14:19:58 +01:00
Makefile	MIPS: unify CPU code in arch/mips/cpu/	2015-01-30 14:19:58 +01:00
start.S	MIPS: Preserve Config implementation-defined bits	2016-09-21 15:04:04 +02:00
time.c	MIPS: unify CPU code in arch/mips/cpu/	2015-01-30 14:19:58 +01:00
u-boot-spl.lds	MIPS: provide a default u-boot-spl.lds	2016-05-31 09:38:11 +02:00
u-boot.lds	MIPS: add .padding section to linker script	2014-11-01 18:18:05 +01:00