mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 19:26:16 +09:00
01abae4d04
Withd53ecad92fsome unused interrupt related code was removed. However all of these options are currently unused. Rather than migrate some of these options to Kconfig we just remove the code in question. The only related code changes here are that in some cases we use CONFIG_STACKSIZE in non-IRQ related context. In these cases we rename and move the value local to the code in question. Fixes:d53ecad92f("Merge branch 'master' of git://git.denx.de/u-boot-sunxi") Signed-off-by: Tom Rini <trini@konsulko.com>
236 lines
6.4 KiB
C
236 lines
6.4 KiB
C
/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MX6UL_14X14_EVK_CONFIG_H
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#define __MX6UL_14X14_EVK_CONFIG_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#include "mx6_common.h"
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#include <asm/imx-common/gpio.h>
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#define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
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/* SPL options */
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#include "imx6_spl.h"
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* MMC Configs */
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#ifdef CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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/* NAND pin conflicts with usdhc2 */
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#ifdef CONFIG_NAND_MXS
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#else
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#endif
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#endif
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/* I2C configs */
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC only for 9X9 EVK */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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#endif
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=undefined\0" \
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"fdt_addr=0x83000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"findfdt="\
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"if test $fdt_file = undefined; then " \
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"if test $board_name = EVK && test $board_rev = 9X9; then " \
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"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
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"if test $board_name = EVK && test $board_rev = 14X14; then " \
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"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
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"if test $fdt_file = undefined; then " \
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"echo WARNING: Could not determine dtb to use; fi; " \
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"fi;\0" \
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#define CONFIG_BOOTCOMMAND \
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"run findfdt;" \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_CMDLINE_EDITING
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* environment organization */
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
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#define CONFIG_CMD_BMODE
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#ifndef CONFIG_SYS_DCACHE_OFF
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#endif
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#ifdef CONFIG_FSL_QSPI
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 40000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define FSL_QSPI_FLASH_NUM 1
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#define FSL_QSPI_FLASH_SIZE SZ_32M
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#endif
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#ifdef CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define CONFIG_FEC_ENET_DEV 1
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#if (CONFIG_FEC_ENET_DEV == 0)
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x2
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#define CONFIG_FEC_XCV_TYPE RMII
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#elif (CONFIG_FEC_ENET_DEV == 1)
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#define IMX_FEC_BASE ENET2_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1
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#define CONFIG_FEC_XCV_TYPE RMII
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#endif
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#endif
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#define CONFIG_IMX_THERMAL
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#ifndef CONFIG_SPL_BUILD
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_MXS
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_LOGO
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#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
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#endif
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#endif
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#endif
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