Bin Meng 496262cca6 riscv: Fix context restore before returning from trap handler ... sp cannot be loaded before restoring other registers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>		2018-12-18 09:56:27 +08:00
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ax25	riscv: ax25: Hide the ax25-specific Kconfig option	2018-12-18 09:56:26 +08:00
qemu	riscv: Probe cpus during boot	2018-12-18 09:56:27 +08:00
cpu.c	riscv: Do some basic architecture level cpu initialization	2018-12-18 09:56:27 +08:00
Makefile	riscv: Move trap handler codes to mtrap.S	2018-12-18 09:56:27 +08:00
mtrap.S	riscv: Fix context restore before returning from trap handler	2018-12-18 09:56:27 +08:00
start.S	riscv: Move trap handler codes to mtrap.S	2018-12-18 09:56:27 +08:00
u-boot.lds	riscv: Make start.S available for all targets	2018-10-03 17:48:14 +08:00