Michal Simek 48255f5276 ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins ... Mode pins can be used as output for reset. Xilinx boards are using this feature as additional way how to reset USB phys and also others chips on the boards. Mode1 is used on all these boards for this feature. Let SPL toggle reset on this pin by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2016-09-22 07:33:21 +02:00
..
clk.c	ARM64: zynqmp: Remove get_uart_clk()	2016-07-22 14:04:41 +02:00
cpu.c	armv8: mmu: Add support of non-identical mapping	2016-07-15 09:01:43 -07:00
Kconfig	ARM64: zynqmp: Force certain bootmode for SPL	2016-09-22 07:33:20 +02:00
Makefile	ARM64: zynqmp: Add SPL support support	2016-05-24 11:15:01 +02:00
mp.c	Various, unrelated tree-wide typo fixes.	2016-07-16 09:43:12 -04:00
slcr.c	zynqmp: Add support for IP detection via SLCR	2015-07-28 11:56:20 +02:00
spl.c	ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins	2016-09-22 07:33:21 +02:00