u-boot-brain/arch/riscv
Sean Anderson 422c3c5edf riscv: Update SiFive device tree for new CLINT driver
We currently do this in a u-boot specific dts, but hopefully we can get
these bindings added in Linux in the future.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-09-30 08:54:46 +08:00
..
cpu riscv: Rework riscv timer driver to only support S-mode 2020-09-30 08:54:45 +08:00
dts riscv: Update SiFive device tree for new CLINT driver 2020-09-30 08:54:46 +08:00
include/asm riscv: Rework Andes PLMT as a UCLASS_TIMER driver 2020-09-30 08:54:45 +08:00
lib riscv: Rework Sifive CLINT as UCLASS_TIMER driver 2020-09-30 08:54:46 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: Rework Sifive CLINT as UCLASS_TIMER driver 2020-09-30 08:54:46 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00