Marek Vasut 40e7bcdee7 arm: socfpga: cache: Enable D-Cache ... The code is now fixed to the point where we can safely enable the L1 data cache. Enable the D-Cache and set it as write-alloc. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>		2014-10-06 17:46:50 +02:00
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iocsr_config.c	socfpga: Adding Scan Manager driver	2014-07-05 00:27:27 +02:00
iocsr_config.h	socfpga: Adding Scan Manager driver	2014-07-05 00:27:27 +02:00
Kconfig	kconfig: remove redundant "string" type in arch and board Kconfigs	2014-09-13 16:43:55 -04:00
MAINTAINERS	Add board MAINTAINERS files	2014-07-30 08:48:06 -04:00
Makefile	socfpga: Fix SOCFPGA build error for Altera dev kit	2014-08-29 15:50:54 -04:00
pinmux_config.c	socfpga: Adding pin mux handoff files	2013-10-07 19:32:30 +02:00
pinmux_config.h	socfpga: Adding pin mux handoff files	2013-10-07 19:32:30 +02:00
pll_config.h	arm: socfpga: clock: Add missing stubs into board file	2014-10-06 17:46:48 +02:00
socfpga_cyclone5.c	arm: socfpga: cache: Enable D-Cache	2014-10-06 17:46:50 +02:00