u-boot-brain/arch/arc
Alexey Brodkin 40a808f173 ARCv2: SLC: Make sure busy bit is set properly on SLC flushing
As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.

Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-04-11 17:54:31 +03:00
..
cpu arc: No need in sections defined in sources with newer tools 2016-08-05 12:50:25 +03:00
dts arc: dts: separate single axs10x.dts file 2017-03-24 14:47:52 +03:00
include/asm board_f: Make relocation functions generic 2017-04-05 16:36:57 -04:00
lib ARCv2: SLC: Make sure busy bit is set properly on SLC flushing 2017-04-11 17:54:31 +03:00
config.mk arc: Use -mcpu=XXX instead of obsolete -marcXXX 2016-09-16 12:12:26 +03:00
Kconfig arc: dts: separate single axs10x.dts file 2017-03-24 14:47:52 +03:00
Makefile arc: introduce separate section for interrupt vector table 2015-01-15 22:38:42 +03:00