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u-boot-brain/drivers/spi
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Stephen Warren 4832c7f5f7 spi: tegra: fix hang in set_mode() 
In tegra20_slink.c, the set_mode() function may be executed before the
SPI bus is claimed the first time, and hence the clocks to the SPI
controller may not be running. If so, any register read/write at this
time will hang the CPU. Fix this by ensuring the clock is running as soon
as the driver is probed. This is observed on the Tegra30 Beaver board.

Apply the same clock initialization fix to all other Tegra SPI drivers so
that if set_mode() is ever implemented there, the same bug will not appear.
Note that tegra114_spi.c already operates in this fashion.

The clock manipulation code is copied from claim_bus() to probe() rather
than moved. This ensures that any calls to set_speed() take effect; the
clock can't be set once during probe and left unchanged.

Fixes: 5cb1b7b395 ("spi: tegra20: Add support for mode selection")
Cc: Mirza Krak <mirza.krak@hostmobility.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-25 15:35:03 -07:00
..
altera_spi.c altera_spi: change ioremap to map_physmem 2015-11-18 21:18:30 +08:00
armada100_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
ath79_spi.c ath79: spi: Remove the explicit pinctrl setting 2016-05-21 01:36:37 +02:00
atmel_dataflash_spi.c spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation 2014-03-17 21:54:57 +05:30
atmel_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
atmel_spi.h spi: atmel_spi: Use GENMASK 2015-10-27 23:21:42 +05:30
bfin_spi.c Move console definitions into a new console.h file 2015-11-19 20:27:50 -07:00
bfin_spi6xx.c Move console definitions into a new console.h file 2015-11-19 20:27:50 -07:00
cadence_qspi_apb.c spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max value 2016-08-07 21:54:21 +02:00
cadence_qspi.c spi: cadence_quadspi: Enable QUAD mode based on DT data 2016-07-09 20:16:33 +05:30
cadence_qspi.h spi: cadence_quadspi: Enable QUAD mode based on DT data 2016-07-09 20:16:33 +05:30
cf_qspi.c spi: cf_qspi: fix clamp macro type check compilation warnings 2015-07-01 22:58:50 +05:30
cf_spi.c spi: cf_spi: Staticize local functions 2015-03-30 01:42:49 +05:30
davinci_spi.c spi: davinci_spi: Convert to driver to adapt to DM 2016-07-09 20:16:30 +05:30
designware_spi.c spi: designware_spi: Use GENMASK 2015-10-27 23:21:43 +05:30
ep93xx_spi.c bitops: introduce BIT() definition 2015-09-11 17:15:32 -04:00
exynos_spi.c dm: Use dev_get_addr() where possible 2015-08-31 07:57:26 -06:00
fsl_dspi.c spi: fsl: Use BIT macro 2015-10-27 23:19:29 +05:30
fsl_espi.c spi: fsl: Use BIT macro 2015-10-27 23:19:29 +05:30
fsl_qspi.c driver: spi: fsl-qspi: remove compile Warnings 2016-08-02 09:45:13 -07:00
fsl_qspi.h qspi:fsl implement AHB read 2015-01-09 00:03:28 +05:30
ich.c dm: pch: Rename get_sbase op to get_spi_base 2016-02-05 12:47:21 +08:00
ich.h spi: ich: Change PCHV_ to ICHV_ 2016-02-05 12:47:20 +08:00
Kconfig spi: pic32_spi: add SPI master driver for PIC32 SoC. 2016-06-10 12:31:12 +02:00
kirkwood_spi.c spi: kirkwood_spi: Add support for multiple chip-selects on MVEBU 2016-04-06 15:38:56 +02:00
lpc32xx_ssp.c lpc32xx: add LPC32xx SSP support (SPI mode) 2015-04-10 14:23:20 +02:00
Makefile spi: pic32_spi: add SPI master driver for PIC32 SoC. 2016-06-10 12:31:12 +02:00
mpc8xxx_spi.c spi: mpc8xxx_spi: Use BIT macro 2015-10-27 23:21:28 +05:30
mpc52xx_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mxc_spi.c linux/kernel.h: sync min, max, min3, max3 macros with Linux 2014-11-23 06:48:30 -05:00
mxs_spi.c Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h header 2015-09-11 17:15:20 -04:00
omap3_spi.c omap3: Fix SPI registers on am33xx and am43xx 2016-05-23 11:50:22 -04:00
pic32_spi.c spi: pic32_spi: add SPI master driver for PIC32 SoC. 2016-06-10 12:31:12 +02:00
rk_spi.c clk: convert API to match reset/mailbox style 2016-06-19 17:05:55 -06:00
rk_spi.h rockchip: Add SPI driver 2015-09-02 21:28:24 -06:00
sandbox_spi.c dm: spi: Move the per-child data size to the uclass 2015-01-29 17:09:55 -07:00
sh_qspi.c Move console definitions into a new console.h file 2015-11-19 20:27:50 -07:00
sh_spi.c Add more SPDX-License-Identifier tags 2016-01-19 08:31:21 -05:00
sh_spi.h Add more SPDX-License-Identifier tags 2016-01-19 08:31:21 -05:00
soft_spi_legacy.c dm: spi: Remove SPI_INIT feature 2014-10-22 10:36:48 -06:00
soft_spi.c dm: spi: soft_spi: switch to use linux compatible string 2016-05-17 09:54:43 -06:00
spi-emul-uclass.c dm: sandbox: Add a SPI emulation uclass 2014-10-22 10:36:46 -06:00
spi-uclass.c dm: Use dm_scan_fdt_dev() directly where possible 2016-07-27 14:15:54 -06:00
spi.c spi: Support half-duplex mode in FDT decode 2014-08-06 00:18:01 +05:30
tegra_spi.h dm: tegra: spi: Convert to driver model 2014-10-22 10:36:52 -06:00
tegra20_sflash.c spi: tegra: fix hang in set_mode() 2016-08-25 15:35:03 -07:00
tegra20_slink.c spi: tegra: fix hang in set_mode() 2016-08-25 15:35:03 -07:00
tegra114_spi.c Add more SPDX-License-Identifier tags 2016-01-19 08:31:21 -05:00
tegra210_qspi.c spi: tegra: fix hang in set_mode() 2016-08-25 15:35:03 -07:00
ti_qspi.c spi: ti_qspi: dra7xx: Add support to use 76.8MHz clock 2016-07-30 00:15:00 +05:30
xilinx_spi.c spi: xilinx: Add new compatible strings 2015-12-11 22:12:24 +05:30
zynq_qspi.c spi: zynq_qspi: Add configuration to disable LQSPI feature 2015-12-18 13:15:57 +01:00
zynq_spi.c spi: zynq_spi: Add cadence compatible string 2015-12-11 22:12:23 +05:30