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c40b6df87f
Add driver code for the SiFive FU540 PRCI IP block. This IP block handles reset and clock control for the SiFive FU540 device and implements SoC-level clock tree controls and dividers. Based on code written by Wesley Terpstra <wesley@sifive.com> found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of: https://github.com/riscv/riscv-linux Boot and PLL rate change were tested on a SiFive HiFive Unleashed board. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> |
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|---|---|---|
| .. | ||
| bus | ||
| clk | ||
| clock | ||
| comphy | ||
| dma | ||
| gpio | ||
| input | ||
| interrupt-controller | ||
| interrupt-router | ||
| leds | ||
| mailbox | ||
| media | ||
| memory | ||
| mfd | ||
| mrc | ||
| net | ||
| phy | ||
| pinctrl | ||
| pmic | ||
| power | ||
| power-domain | ||
| pwm | ||
| regulator | ||
| reset | ||
| soc | ||
| sound | ||
| thermal | ||
| video | ||