mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-16 09:43:39 +09:00
39665beed6
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't utilize ACPI by default. Here is an attempt to unleash ACPI flexibility power on Intel Merrifield based platforms. The change brings minimum support of the devices that found on Intel Merrifield based end user device. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
299 lines
7.6 KiB
Plaintext
299 lines
7.6 KiB
Plaintext
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* Partially based on southcluster.asl for other x86 platforms
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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Device (PCI0)
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{
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Name (_HID, EISAID("PNP0A08")) /* PCIe */
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Name (_CID, EISAID("PNP0A03")) /* PCI */
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Name (_ADR, 0)
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Name (_BBN, 0)
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Name (MCRS, ResourceTemplate()
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{
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/* Bus Numbers */
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WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
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0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
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/* IO Region 0 */
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WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
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/* PCI Config Space */
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IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
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/* IO Region 1 */
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WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
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/* GPIO Low Memory Region */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000,
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0x00000010, , , GP00)
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/* PSH Memory Region 0 */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x04819000, 0x04898fff, 0x00000000,
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0x00080000, , , PSH0)
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/* PSH Memory Region 1 */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x04919000, 0x04920fff, 0x00000000,
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0x00008000, , , PSH1)
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/* SST Memory Region */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x05e00000, 0x05ffffff, 0x00000000,
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0x00200000, , , SST0)
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/* PCI Memory Region */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x80000000, 0xffffffff, 0x00000000,
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0x80000000, , , PMEM)
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})
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Method (_CRS, 0, Serialized)
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{
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Return (MCRS)
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}
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Method (_OSC, 4)
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{
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/* Check for proper GUID */
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If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) {
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/* Let OS control everything */
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Return (Arg3)
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} Else {
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/* Unrecognized UUID */
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CreateDWordField(Arg3, 0, CDW1)
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Or(CDW1, 4, CDW1)
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Return (Arg3)
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}
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}
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Device (SDHC)
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{
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Name (_ADR, 0x00010003)
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Name (_DEP, Package (0x01)
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{
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GPIO
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})
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Name (PSTS, Zero)
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Method (_STA)
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{
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Return (STA_VISIBLE)
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}
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Method (_PS3, 0, NotSerialized)
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{
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}
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Method (_PS0, 0, NotSerialized)
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{
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If (PSTS == Zero)
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{
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If (^^GPIO.AVBL == One)
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{
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^^GPIO.WFD3 = One
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PSTS = One
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}
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}
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}
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/* BCM43340 */
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Device (BRC1)
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{
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Name (_ADR, 0x01)
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Name (_DEP, Package (0x01)
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{
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GPIO
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})
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Method (_STA)
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{
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Return (STA_VISIBLE)
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}
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Method (_RMV, 0, NotSerialized)
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{
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Return (Zero)
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}
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Method (_PS3, 0, NotSerialized)
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{
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If (^^^GPIO.AVBL == One)
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{
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^^^GPIO.WFD3 = Zero
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PSTS = Zero
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}
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}
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Method (_PS0, 0, NotSerialized)
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{
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If (PSTS == Zero)
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{
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If (^^^GPIO.AVBL == One)
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{
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^^^GPIO.WFD3 = One
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PSTS = One
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}
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}
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}
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}
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Device (BRC2)
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{
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Name (_ADR, 0x02)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Method (_RMV, 0, NotSerialized)
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{
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Return (Zero)
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}
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}
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}
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Device (SPI5)
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{
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Name (_ADR, 0x00070001)
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Name (RBUF, ResourceTemplate()
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{
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 91 }
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 92 }
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 93 }
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 94 }
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})
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Method (_CRS, 0, NotSerialized)
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{
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Return (RBUF)
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}
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/*
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* See
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* http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt
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* for more information about GPIO bindings.
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*/
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Name (_DSD, Package () {
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ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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Package () {
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Package () {
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"cs-gpios", Package () {
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^SPI5, 0, 0, 0,
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^SPI5, 1, 0, 0,
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^SPI5, 2, 0, 0,
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^SPI5, 3, 0, 0,
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},
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},
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}
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})
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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Device (I2C1)
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{
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Name (_ADR, 0x00080000)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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Device (GPIO)
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{
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Name (_ADR, 0x000c0000)
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Method (_STA)
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{
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Return (STA_VISIBLE)
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}
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Name (AVBL, Zero)
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Method (_REG, 2, NotSerialized)
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{
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If (Arg0 == 0x08)
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{
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AVBL = Arg1
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}
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}
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OperationRegion (GPOP, GeneralPurposeIo, 0, 1)
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Field (GPOP, ByteAcc, NoLock, Preserve)
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{
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Connection (
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GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 56 }
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),
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WFD3, 1,
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}
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}
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Device (PWM0)
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{
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Name (_ADR, 0x00170000)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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}
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Device (FLIS)
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{
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Name (_HID, "PRP0001")
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Name (_DDN, "Intel Merrifield Family-Level Interface Shim")
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Name (RBUF, ResourceTemplate()
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{
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Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000, )
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PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 }
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PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 }
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PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 }
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PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 }
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PinGroup("pwm0", ResourceProducer, ) { 144 }
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PinGroup("pwm1", ResourceProducer, ) { 145 }
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PinGroup("pwm2", ResourceProducer, ) { 132 }
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PinGroup("pwm3", ResourceProducer, ) { 133 }
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})
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Method (_CRS, 0, NotSerialized)
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{
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Return (RBUF)
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}
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Name (_DSD, Package () {
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ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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Package () {
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Package () {"compatible", "intel,merrifield-pinctrl"},
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}
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})
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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