Simon Glass 38d6b7ebda spl: Drop bd_info in the data section ... This uses up space in the SPL binary but it always starts as zero. Also some boards cannot support data in TPL (e.g. Intel Apollo Lake). Use malloc() to allocate this structure instead, by moving the init a little later, after malloc() is inited. Make this function optional since it pulls in malloc(). This reduces the TPL binary size on coral by about 64 bytes Signed-off-by: Simon Glass <sjg@chromium.org>		2021-01-05 12:24:40 -07:00
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doc	pci: layerscape: add a way of specifying additional iommu mappings	2020-10-23 16:52:09 +05:30
cpu.c	net: lx2160a.c: Update to set ECx_PMUX precedence	2020-10-23 16:52:09 +05:30
cpu.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
fdt.c	treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORT	2020-12-04 16:09:05 -05:00
fsl_lsch2_serdes.c	common: Drop linux/delay.h from common header	2020-05-18 21:19:23 -04:00
fsl_lsch2_speed.c	common: Move clock functions into a new file	2020-01-17 13:27:29 -05:00
fsl_lsch3_serdes.c	common: Drop linux/bitops.h from common header	2020-05-18 21:19:23 -04:00
fsl_lsch3_speed.c	common: Move clock functions into a new file	2020-01-17 13:27:29 -05:00
icid.c	armv8: fsl-layerscape: make icid setup endianness aware	2019-08-22 09:07:36 +05:30
Kconfig	arm64: ls1043a: Remove the workaround of erratum A-009929	2020-07-27 14:16:28 +05:30
lowlevel.S	armv8: layerscape: don't initialize GIC in SPL	2020-12-04 16:09:06 -05:00
ls1012a_serdes.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
ls1028_ids.c	common: Drop log.h from common header	2020-05-18 21:19:18 -04:00
ls1028a_serdes.c	armv8: ls1028a_serdes: Add few missing serdes protocols	2020-01-24 14:28:26 +05:30
ls1043_ids.c	armv8: fsl-layerscape: fix SEC QI ICID setup	2019-03-03 22:01:09 +05:30
ls1043a_psci.S	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
ls1043a_serdes.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
ls1046_ids.c	armv8: fsl-layerscape: fix SEC QI ICID setup	2019-03-03 22:01:09 +05:30
ls1046a_serdes.c	armv8: ls1046afrwy: Add support for LS1046AFRWY platform	2019-06-19 12:54:57 +05:30
ls1088_ids.c	armv8: fsl-layerscape: guard caam specific defines	2019-11-08 11:13:38 +05:30
ls1088a_serdes.c	armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port	2020-01-24 14:28:26 +05:30
ls2080a_serdes.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
ls2088_ids.c	armv8: ls2088a: add icid setup for platform devices	2019-11-08 11:13:38 +05:30
lx2160_ids.c	armv8: lx2160a: add icid setup for platform devices	2019-11-08 11:13:38 +05:30
lx2160a_serdes.c	armv8: lx2160a: Add LX2160A SoC Support	2018-12-06 14:37:19 -08:00
Makefile	armv8: layerscape: move spin table into own module	2020-07-27 14:16:27 +05:30
mp.c	armv8: layerscape: relocate spin table if EFI_LOADER is enabled	2020-07-27 14:16:28 +05:30
ppa.c	treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORT	2020-12-04 16:09:05 -05:00
soc.c	arm: fsl-layerscape: Include device_compat.h in soc.c	2020-10-16 09:44:27 -04:00
spintable.S	armv8: layerscape: rework spin table	2020-07-27 14:16:28 +05:30
spl.c	spl: Drop bd_info in the data section	2021-01-05 12:24:40 -07:00