u-boot-brain/arch/mips/cpu
Marek Vasut 36d0a42b68 dm: mips: Fix lb60 WDT control
Write the TSCR register via 32bit write instead of 16bit one.
The register is 32bit wide and bit 16 is being set, triggering
gcc overflow error and making the code broken.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2012-08-17 20:13:48 +02:00
..
mips32 net: Fix remaining API interface breakage 2012-05-23 14:19:21 -05:00
xburst dm: mips: Fix lb60 WDT control 2012-08-17 20:13:48 +02:00