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https://github.com/brain-hackers/u-boot-brain
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![]() To activate the csg option, the driver need to set the bit2 of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator of PLLn enable. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
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microchip,pic32-clock.txt | ||
nvidia,tegra20-car.txt | ||
rockchip,rk3188-cru.txt | ||
rockchip,rk3288-cru.txt | ||
rockchip,rk3288-dmc.txt | ||
rockchip,rk3368-dmc.txt | ||
rockchip,rk3399-dmc.txt | ||
rockchip.txt | ||
snps,hsdk-cgu.txt | ||
st,stm32-rcc.txt | ||
st,stm32h7-rcc.txt | ||
st,stm32mp1.txt | ||
ti,sci-clk.txt |