Chen-Yu Tsai 328ce7fd50 sunxi: Set PLL lock enable bits for R40 ... According to the BSP released by Banana Pi, the R40 (sun8iw11p1) has an extra "PLL lock control" register in the CCU, which controls whether the individual PLL lock status bits in each PLL's control register work or not. This patch enables it for all the PLLs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>		2017-04-20 13:30:01 +02:00
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arc	board_f: Rename initdram() to dram_init()	2017-04-13 09:40:57 -04:00
arm	sunxi: Set PLL lock enable bits for R40	2017-04-20 13:30:01 +02:00
avr32	Remove various unused interrupt related code	2017-04-06 20:42:18 -04:00
m68k	spi: Zap cf_qspi driver and related code	2017-01-15 18:29:04 +01:00
microblaze	microblaze: Fix endif macro command	2017-02-10 13:59:36 +01:00
mips	board_f: Rename initdram() to dram_init()	2017-04-13 09:40:57 -04:00
nds32	Remove various unused interrupt related code	2017-04-06 20:42:18 -04:00
nios2	board_f: Rename initdram() to dram_init()	2017-04-13 09:40:57 -04:00
powerpc	board_f: Rename initdram() to dram_init()	2017-04-13 09:40:57 -04:00
sandbox	sandbox: Add some test LEDs	2017-04-14 19:38:57 -06:00
sh	sh: generate position independent code for all platforms	2016-12-02 21:32:54 -05:00
x86	x86: Introduce minimal PMU driver for Intel MID platforms	2017-04-10 10:02:03 +08:00
xtensa	board_f: Rename initdram() to dram_init()	2017-04-13 09:40:57 -04:00
.gitignore	.gitignore: drop include/asm/proc from ignore pattern	2014-06-19 11:18:54 -04:00
Kconfig	OpenRISC: Remove	2017-04-05 13:52:34 -04:00