mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 10:59:43 +09:00
9623c158f6
* 'master' of git://git.denx.de/u-boot-arm: run arm_pci_init after relocation IXP42x PCI rewrite update/fix PDNB3 board update/fix IXDP425 / IXDPG425 boards add dvlhost (dLAN 200 AV Wireless G) board IXP NPE: add support for fixed-speed MII ports update/fix AcTux4 board update/fix AcTux3 board update/fix AcTux2 board update/fix AcTux1 board use -ffunction-sections / --gc-sections on IXP42x support CONFIG_SYS_LDSCRIPT on ARM fix "depend" target in npe directory Fix IXP code to work after relocation was added trigger hardware watchdog in IXP42x serial driver add support for IXP42x Rev. B1 and newer add XScale sub architecture (IXP/PXA) to maintainer list Conflicts: arch/arm/lib/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
95 lines
3.3 KiB
C
95 lines
3.3 KiB
C
/*
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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/*
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* The following data structure is placed in some memory wich is
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* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
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* some locked parts of the data cache) to allow for a minimum set of
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* global variables during system initialization (until we have set
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* up the memory controller so that we can use RAM).
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*
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* Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
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*/
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typedef struct global_data {
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bd_t *bd;
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unsigned long flags;
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unsigned long baudrate;
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unsigned long have_console; /* serial_init() was called */
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unsigned long env_addr; /* Address of Environment struct */
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unsigned long env_valid; /* Checksum of Environment valid? */
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unsigned long fb_base; /* base address of frame buffer */
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#ifdef CONFIG_FSL_ESDHC
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unsigned long sdhc_clk;
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#endif
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#ifdef CONFIG_AT91FAMILY
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/* "static data" needed by at91's clock.c */
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unsigned long cpu_clk_rate_hz;
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unsigned long main_clk_rate_hz;
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unsigned long mck_rate_hz;
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unsigned long plla_rate_hz;
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unsigned long pllb_rate_hz;
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unsigned long at91_pllb_usb_init;
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#endif
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#ifdef CONFIG_ARM
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/* "static data" needed by most of timer.c on ARM platforms */
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unsigned long timer_rate_hz;
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unsigned long tbl;
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unsigned long tbu;
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unsigned long long timer_reset_value;
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unsigned long lastinc;
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#endif
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#ifdef CONFIG_IXP425
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unsigned long timestamp;
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#endif
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unsigned long relocaddr; /* Start address of U-Boot in RAM */
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phys_size_t ram_size; /* RAM size */
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unsigned long mon_len; /* monitor len */
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unsigned long irq_sp; /* irq stack pointer */
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unsigned long start_addr_sp; /* start_addr_stackpointer */
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unsigned long reloc_off;
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#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
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unsigned long tlb_addr;
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#endif
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void **jt; /* jump table */
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char env_buf[32]; /* buffer for getenv() before reloc. */
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} gd_t;
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/*
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* Global Data Flags
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*/
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#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
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#define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")
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#endif /* __ASM_GBL_DATA_H */
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