Aneesh V 2c451f7831 armv7: cache maintenance operations for armv7 ... - Add a framework for layered cache maintenance - separate out SOC specific outer cache maintenance from maintenance of caches known to CPU - Add generic ARMv7 cache maintenance operations that affect all caches known to ARMv7 CPUs. For instance in Cortex-A8 these opertions will affect both L1 and L2 caches. In Cortex-A9 these will affect only L1 cache - D-cache operations supported: - Invalidate entire D-cache - Invalidate D-cache range - Flush(clean & invalidate) entire D-cache - Flush D-cache range - I-cache operations supported: - Invalidate entire I-cache - Add maintenance functions for TLB, branch predictor array etc. - Enable -march=armv7-a so that armv7 assembly instructions can be used Signed-off-by: Aneesh V <aneesh@ti.com>		2011-07-04 10:55:25 +02:00
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arm	armv7: cache maintenance operations for armv7	2011-07-04 10:55:25 +02:00
avr32	avr32: add ATAG_BOARDINFO	2011-05-18 07:56:54 +02:00
blackfin	Blackfin: use on-chip reset func with newer parts	2011-06-03 13:26:45 -04:00
m68k	Merge branch 'master' of git://git.denx.de/u-boot-arm	2011-04-27 21:48:09 +02:00
microblaze	Make STANDALONE_LOAD_ADDR configurable per board	2011-04-12 22:58:32 +02:00
mips	MIPS: Move timer code to arch/mips/cpu/$(CPU)/	2011-05-10 00:12:31 +09:00
nios2	nios2: Make STANDALONE_LOAD_ADDR configurable per board	2011-05-16 21:00:43 -04:00
powerpc	powerpc/fsl_pci: Fix device tree fixups for newer platforms	2011-05-20 00:48:41 -05:00
sh	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00
sparc	Make STANDALONE_LOAD_ADDR configurable per board	2011-04-12 22:58:32 +02:00
x86	Minor coding style cleanup.	2011-05-19 22:22:44 +02:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00