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2becdc6f9d
u-boot-brain/arch/powerpc/cpu
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York Sun 2becdc6f9d powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ram 
MPC85xx has been using locked L1 cache as init_ram. L1 cache is a write
through cache on E6500. L2 cache is enabled to to hold the data. This
patch locks/unlocks L2 cache to ensure no data cast out from L2 cache.

Signed-off-by: York Sun <yorksun@freescale.com>
Reported-by: Jeffery Zhu <Jefferry.Zhu@freescale.com>
2015-09-01 20:42:54 -05:00
..
mpc5xx arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
mpc5xxx arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
mpc8xx arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
mpc8xxx powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs 2015-03-04 10:15:29 -08:00
mpc83xx arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
mpc85xx powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ram 2015-09-01 20:42:54 -05:00
mpc86xx arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
mpc512x arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
mpc8260 arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
ppc4xx arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
Makefile Makefile: Select objects by CONFIG_ rather than $(ARCH) or $(CPU) 2013-12-16 08:59:42 -05:00