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![]() The J721E SoCs have two TMS320C66x DSP Core Subsystems (C66x CorePacs) in the MAIN voltage domain, each with a C66x Fixed/Floating-Point DSP Core, and 32 KB of L1P & L1D configurable SRAMs/Cache and an additional 288 KB of L2 configurable SRAM/Cache. These subsystems do not have an MMU but contain a Region Address Translator (RAT) sub-module for translating 32-bit processor addresses into larger bus addresses. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. Add the DT nodes for these DSP processor sub-systems in the common k3-j721e-main.dtsi file. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> |
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.. | ||
cpu | ||
dts | ||
include | ||
lib | ||
mach-aspeed | ||
mach-at91 | ||
mach-bcm283x | ||
mach-bcmstb | ||
mach-davinci | ||
mach-exynos | ||
mach-highbank | ||
mach-imx | ||
mach-integrator | ||
mach-k3 | ||
mach-keystone | ||
mach-kirkwood | ||
mach-mediatek | ||
mach-meson | ||
mach-mvebu | ||
mach-omap2 | ||
mach-orion5x | ||
mach-owl | ||
mach-qemu | ||
mach-rmobile | ||
mach-rockchip | ||
mach-s5pc1xx | ||
mach-snapdragon | ||
mach-socfpga | ||
mach-sti | ||
mach-stm32 | ||
mach-stm32mp | ||
mach-sunxi | ||
mach-tegra | ||
mach-uniphier | ||
mach-versal | ||
mach-versatile | ||
mach-zynq | ||
mach-zynqmp | ||
mach-zynqmp-r5 | ||
thumb1/include/asm/proc-armv | ||
config.mk | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |