Lokesh Vutla 293e39780d arm: dts: k3-j721e-main: Add C66x DSP nodes ... The J721E SoCs have two TMS320C66x DSP Core Subsystems (C66x CorePacs) in the MAIN voltage domain, each with a C66x Fixed/Floating-Point DSP Core, and 32 KB of L1P & L1D configurable SRAMs/Cache and an additional 288 KB of L2 configurable SRAM/Cache. These subsystems do not have an MMU but contain a Region Address Translator (RAT) sub-module for translating 32-bit processor addresses into larger bus addresses. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. Add the DT nodes for these DSP processor sub-systems in the common k3-j721e-main.dtsi file. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2019-10-11 10:07:35 -04:00
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arc	NET: DW: fix regression for ARC boards	2019-10-07 13:23:49 -04:00
arm	arm: dts: k3-j721e-main: Add C66x DSP nodes	2019-10-11 10:07:35 -04:00
m68k	env: Drop environment.h header file where not needed	2019-08-11 16:43:41 -04:00
microblaze	microblaze: Setup initrd_high and fdt_high at run time	2019-10-08 09:55:11 +02:00
mips	env: Move env_init() to env.h	2019-08-11 16:43:41 -04:00
nds32	env: Drop environment.h header file where not needed	2019-08-11 16:43:41 -04:00
nios2	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2018-06-18 14:43:12 -04:00
powerpc	MPC8548: dts: Added PCIe DT node	2019-08-28 13:47:47 +05:30
riscv	riscv: cache: use CCTL to flush d-cache	2019-09-03 09:31:03 +08:00
sandbox	sandbox: pci: Create a new sandbox_pci_read_bar() function	2019-10-08 13:57:48 +08:00
sh	sh: r2dplus: Fix missing PCI range	2019-09-14 21:28:55 +02:00
x86	x86: Use mtrr_commit() with FSP2	2019-10-08 13:57:49 +08:00
xtensa	env: Move env_get() to env.h	2019-08-11 16:43:41 -04:00
.gitignore
Kconfig	sh: r2dplus: Enable OF control	2019-09-02 17:38:43 +02:00