u-boot-brain/arch/riscv/cpu
Bin Meng 27dc2c130e riscv: qemu: Create a simple-bus driver for the soc node
To enumerate devices on the /soc/ node, create a "simple-bus"
driver to match "riscv-virtio-soc".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00
..
ax25 riscv: cache: Implement i/dcache [status, enable, disable] 2018-11-26 13:58:01 +08:00
qemu riscv: qemu: Create a simple-bus driver for the soc node 2018-12-18 09:56:26 +08:00
cpu.c riscv: save hart ID and device tree passed by prior boot stage 2018-11-26 13:57:32 +08:00
Makefile riscv: Make start.S available for all targets 2018-10-03 17:48:14 +08:00
start.S riscv: ax25-ae350: Pass dtb address to u-boot with a1 register 2018-12-05 14:14:16 +08:00
u-boot.lds riscv: Make start.S available for all targets 2018-10-03 17:48:14 +08:00