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https://github.com/brain-hackers/u-boot-brain
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9e9dfc1fc4
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support OSPI boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
106 lines
2.8 KiB
Plaintext
106 lines
2.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for AM6 SoC Family MCU Domain peripherals
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*
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* Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
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*/
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&cbass_mcu {
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mcu_uart0: serial@40a00000 {
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compatible = "ti,am654-uart";
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reg = <0x00 0x40a00000 0x00 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <96000000>;
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current-speed = <115200>;
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};
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mcu_i2c0: i2c@40b00000 {
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compatible = "ti,am654-i2c", "ti,omap4-i2c";
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reg = <0x0 0x40b00000 0x0 0x100>;
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interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "fck";
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clocks = <&k3_clks 114 1>;
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power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
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};
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mcu_r5fss0: r5fss@41000000 {
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compatible = "ti,am654-r5fss";
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lockstep-mode = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x41000000 0x00 0x41000000 0x20000>,
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<0x41400000 0x00 0x41400000 0x20000>;
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power-domains = <&k3_pds 129 TI_SCI_PD_EXCLUSIVE>;
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mcu_r5fss0_core0: r5f@41000000 {
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compatible = "ti,am654-r5f";
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reg = <0x41000000 0x00008000>,
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<0x41010000 0x00008000>;
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reg-names = "atcm", "btcm";
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <159>;
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ti,sci-proc-ids = <0x01 0xFF>;
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resets = <&k3_reset 159 1>;
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atcm-enable = <1>;
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btcm-enable = <1>;
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loczrama = <1>;
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};
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mcu_r5fss0_core1: r5f@41400000 {
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compatible = "ti,am654-r5f";
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reg = <0x41400000 0x00008000>,
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<0x41410000 0x00008000>;
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reg-names = "atcm", "btcm";
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <245>;
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ti,sci-proc-ids = <0x02 0xFF>;
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resets = <&k3_reset 245 1>;
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atcm-enable = <1>;
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btcm-enable = <1>;
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loczrama = <1>;
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};
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};
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fss: fss@47000000 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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ospi0: spi@47040000 {
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compatible = "ti,am654-ospi", "cdns,qspi-nor";
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reg = <0x0 0x47040000 0x0 0x100>,
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<0x5 0x00000000 0x1 0x0000000>;
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interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>;
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x0>;
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clocks = <&k3_clks 248 0>;
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assigned-clocks = <&k3_clks 248 0>;
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assigned-clock-parents = <&k3_clks 248 2>;
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assigned-clock-rates = <166666666>;
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power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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ospi1: spi@47050000 {
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compatible = "ti,am654-ospi", "cdns,qspi-nor";
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reg = <0x0 0x47050000 0x0 0x100>,
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<0x7 0x00000000 0x1 0x00000000>;
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interrupts = <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x0>;
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clocks = <&k3_clks 249 6>;
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power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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