mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
2473e13bb8
All SoCFPGA platforms (except Cyclone V) are now switching to CONFIG_WDT (driver model for watchdog timer drivers) from CONFIG_HW_WATCHDOG. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
47 lines
597 B
Plaintext
47 lines
597 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* U-Boot additions
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*
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* Copyright (C) 2019 Intel Corporation <www.intel.com>
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*/
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#include "socfpga_agilex-u-boot.dtsi"
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/{
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aliases {
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spi0 = &qspi;
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i2c0 = &i2c1;
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};
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memory {
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/* 8GB */
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reg = <0 0x00000000 0 0x80000000>,
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<2 0x80000000 1 0x80000000>;
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};
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};
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&flash0 {
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compatible = "jedec,spi-nor";
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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u-boot,dm-pre-reloc;
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};
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&i2c1 {
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status = "okay";
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};
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&mmc {
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drvsel = <3>;
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smplsel = <0>;
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u-boot,dm-pre-reloc;
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};
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&qspi {
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status = "okay";
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};
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&watchdog0 {
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u-boot,dm-pre-reloc;
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};
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