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arm: socfpga: Use DM watchdog timer 

All SoCFPGA platforms (except Cyclone V) are now switching
to CONFIG_WDT (driver model for watchdog timer drivers)
from CONFIG_HW_WATCHDOG.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Chee Hong Ang 2020-08-06 12:15:33 +08:00 committed by Ley Foon Tan
parent b3e2d9fccb
commit 2473e13bb8
7 changed files with 13 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
View File

@ -40,3 +40,7 @@
&qspi {
status = "okay";
};
&watchdog0 {
u-boot,dm-pre-reloc;
};

4
arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi
View File

@ -15,3 +15,7 @@
&uart1 {
u-boot,dm-pre-reloc;
};
&watchdog1 {
u-boot,dm-pre-reloc;
};

1
arch/arm/dts/socfpga_stratix10.dtsi
View File

@ -386,7 +386,6 @@
reg = <0xffd00200 0x100>;
interrupts = <0 117 4>;
resets = <&rst WATCHDOG0_RESET>;
u-boot,dm-pre-reloc;
status = "disabled";
};

1
arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi
View File

@ -33,5 +33,6 @@
};
&watchdog0 {
status = "okay";
u-boot,dm-pre-reloc;
};

2
arch/arm/mach-socfpga/spl_agilex.c
View File

@ -51,11 +51,11 @@ void board_init_f(ulong dummy)
socfpga_get_managers_addr();
#ifdef CONFIG_HW_WATCHDOG
/* Ensure watchdog is paused when debugging is happening */
writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
#ifdef CONFIG_HW_WATCHDOG
/* Enable watchdog before initializing the HW */
socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);

2
arch/arm/mach-socfpga/spl_s10.c
View File

@ -53,11 +53,11 @@ void board_init_f(ulong dummy)
socfpga_get_managers_addr();
#ifdef CONFIG_HW_WATCHDOG
/* Ensure watchdog is paused when debugging is happening */
writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
#ifdef CONFIG_HW_WATCHDOG
/* Enable watchdog before initializing the HW */
socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);

2
configs/socfpga_agilex_defconfig
View File

@ -60,5 +60,7 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_PANIC_HANG=y