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https://github.com/brain-hackers/u-boot-brain
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bd0f5a91f3
Add code to get the FPGA type for Altera's SoCFPGA family of FPGA. The code uses the scan manager to send jtag pulses that will return the FPGA ID. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
27 lines
541 B
C
27 lines
541 B
C
/*
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* Copyright (C) 2013 Altera Corporation <www.altera.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SCAN_MANAGER_H_
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#define _SCAN_MANAGER_H_
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struct socfpga_scan_manager {
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u32 stat;
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u32 en;
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u32 padding[2];
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u32 fifo_single_byte;
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u32 fifo_double_byte;
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u32 fifo_triple_byte;
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u32 fifo_quad_byte;
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};
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int scan_mgr_configure_iocsr(void);
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u32 scan_mgr_get_fpga_id(void);
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int iocsr_get_config_table(const unsigned int chain_id,
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const unsigned long **table,
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unsigned int *table_len);
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#endif /* _SCAN_MANAGER_H_ */
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