u-boot-brain/arch/riscv
Sean Anderson 237e5880f8 spi: dw: Add SoC-specific compatible strings
This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.

Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
..
cpu riscv: fix the wrong swap value register 2020-12-14 15:16:34 +08:00
dts spi: dw: Add SoC-specific compatible strings 2020-12-18 16:16:37 +05:30
include/asm riscv: Use a valid bit to ignore already-pending IPIs 2020-09-30 08:54:52 +08:00
lib riscv: Complete efi header for RV32/64 2020-12-14 15:16:54 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: Move Andes PLMT driver to drivers/timer 2020-10-26 10:01:28 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00