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![]() Enable support for the MIPS Coherence Manager & L2 caches on the MIPS Malta board, removing the need for us to attempt to bypass the L2 during boot (which would fail with recent CPUs that expose L2 config via the CM anyway). Signed-off-by: Paul Burton <paul.burton@imgtec.com> |
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.. | ||
flash-malta-boot.tcl | ||
Kconfig | ||
lowlevel_init.S | ||
MAINTAINERS | ||
Makefile | ||
malta.c | ||
superio.c | ||
superio.h |