malta: Use I/O accessors for SuperI/O controller

Rather than passing the I/O port base address to the Super I/O code,
switch it to using outb such that it makes use of the I/O port base
address automatically.

Drop the extern keyword to satisfy checkpatch whilst here.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This commit is contained in:
Paul Burton 2016-01-29 13:54:54 +00:00 committed by Daniel Schwierzeck
parent 19a5ef60bb
commit 91ec615e54
3 changed files with 11 additions and 11 deletions

View File

@ -130,26 +130,26 @@ void _machine_restart(void)
int board_early_init_f(void)
{
void *io_base;
ulong io_base;
/* choose correct PCI I/O base */
switch (malta_sys_con()) {
case SYSCON_GT64120:
io_base = (void *)CKSEG1ADDR(MALTA_GT_PCIIO_BASE);
io_base = CKSEG1ADDR(MALTA_GT_PCIIO_BASE);
break;
case SYSCON_MSC01:
io_base = (void *)CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE);
io_base = CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE);
break;
default:
return -1;
}
set_io_port_base((ulong)io_base);
set_io_port_base(io_base);
/* setup FDC37M817 super I/O controller */
malta_superio_init(io_base);
malta_superio_init();
return 0;
}

View File

@ -45,19 +45,19 @@ static struct {
{ SIOCONF_ACTIVATE, 0x01 },
};
void malta_superio_init(void *io_base)
void malta_superio_init(void)
{
unsigned i;
/* enter config state */
writeb(SIOCONF_ENTER_SETUP, io_base + SIO_CONF_PORT);
outb(SIOCONF_ENTER_SETUP, SIO_CONF_PORT);
/* configure peripherals */
for (i = 0; i < ARRAY_SIZE(sio_config); i++) {
writeb(sio_config[i].key, io_base + SIO_CONF_PORT);
writeb(sio_config[i].data, io_base + SIO_DATA_PORT);
outb(sio_config[i].key, SIO_CONF_PORT);
outb(sio_config[i].data, SIO_DATA_PORT);
}
/* exit config state */
writeb(SIOCONF_EXIT_SETUP, io_base + SIO_CONF_PORT);
outb(SIOCONF_EXIT_SETUP, SIO_CONF_PORT);
}

View File

@ -10,6 +10,6 @@
#ifndef __BOARD_MALTA_SUPERIO_H__
#define __BOARD_MALTA_SUPERIO_H__
extern void malta_superio_init(void *io_base);
void malta_superio_init(void);
#endif /* __BOARD_MALTA_SUPERIO_H__ */