u-boot-brain/arch/arm/cpu
Peng Fan 208bd51396 arm: armv8 correct value passed to __asm_dcache_all
>From source code comments:
"x0: 0 flush & invalidate, 1 invalidate only"

Current value 0xffff can make invalidate work, since we only judge whether
input value is 0 or not, see following code:
"
    tbz     w1, #0, 1f
    dc      isw, x9
    b       2f
1:  dc      cisw, x9      /* clean & invalidate by set/way */
2:  subs    x6, x6, #1    /* decrement the way */
"

Later we may add "2 clean only" support. So following the comments,
correct value from 0xffff to 1.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2015-09-12 09:03:39 +02:00
..
arm11 ARM: cache: implement a default weak flush_cache() function 2015-08-12 20:47:48 -04:00
arm720t ARM: ARM720t: remove empty asm/arch/hardware.h 2015-04-23 08:52:27 -04:00
arm920t ARM: move -march=* and -mtune= options to arch/arm/Makefile 2015-03-27 16:55:22 +01:00
arm926ejs imx: mxs: reimplement get_cpu_rev 2015-09-02 15:29:14 +02:00
arm946es ARM: integrator: abolish CONFIG_INTEGRATOR 2015-04-23 08:52:27 -04:00
arm1136 imx: mx31 use new formula for get_cpu_rev 2015-09-02 15:29:14 +02:00
arm1176 arm1136/arm1176: Merge cache handling code 2015-08-12 20:47:41 -04:00
armv7 Merge git://git.denx.de/u-boot-rockchip 2015-09-03 14:57:09 -04:00
armv7m stm32f4: add cpu clock option for 180 MHz 2015-07-27 15:02:14 -04:00
armv8 arm: armv8 correct value passed to __asm_dcache_all 2015-09-12 09:03:39 +02:00
pxa arm: pxa: clean-up include file order 2015-08-24 20:30:37 +02:00
sa1100 ARM: move -march=* and -mtune= options to arch/arm/Makefile 2015-03-27 16:55:22 +01:00
Makefile ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
u-boot-spl.lds dm: arm: Put driver model I2C drivers before legacy ones 2015-07-21 17:39:21 -06:00
u-boot.lds ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditions 2015-05-13 09:24:13 -07:00