mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 00:18:51 +09:00
1dec7fa797
Remove old (pre-DM) i2c setup code. Enable DM i2c. Convert common code to use DM rtc. Convert common code to read VPD from eeprom partition. Convert the generic i2c PMIC init code to use the new da9063 driver. mx53ppd only: Correct RTC compatible in device tree. Enable MXC DM i2c driver. Define CONFIG_SYS_MALLOC_F_LEN so that DM is available in pre-reloc. Make GPIO banks available during preloc, since initialisation is done in board_early_init_f(). Add gpio_request() calls to satisfy the DM_GPIO compatibility API. Remove unused power configuration. Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Ian Ray <ian.ray@ge.com>
136 lines
3.4 KiB
C
136 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2017 General Electric Company
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*
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* Based on board/freescale/mx53loco/mx53loco_video.c:
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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* Fabio Estevam <fabio.estevam@freescale.com>
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*/
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#include <common.h>
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#include <linux/list.h>
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#include <asm/gpio.h>
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#include <asm/arch/iomux-mx53.h>
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#include <linux/fb.h>
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#include <ipu_pixfmt.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/io.h>
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#include <pwm.h>
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#include "ppd_gpio.h"
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#define MX53PPD_LCD_POWER IMX_GPIO_NR(3, 24)
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static struct fb_videomode const nv_spwg = {
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.name = "NV-SPWGRGB888",
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.refresh = 60,
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.xres = 800,
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.yres = 480,
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.pixclock = 15384,
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.left_margin = 16,
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.right_margin = 210,
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.upper_margin = 10,
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.lower_margin = 22,
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.hsync_len = 30,
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.vsync_len = 13,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED
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};
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void setup_iomux_lcd(void)
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{
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static const iomux_v3_cfg_t lcd_pads[] = {
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MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK,
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MX53_PAD_DI0_PIN15__IPU_DI0_PIN15,
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MX53_PAD_DI0_PIN2__IPU_DI0_PIN2,
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MX53_PAD_DI0_PIN3__IPU_DI0_PIN3,
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MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0,
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MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1,
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MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2,
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MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3,
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MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4,
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MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5,
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MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6,
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MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7,
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MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8,
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MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9,
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MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10,
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MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11,
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MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12,
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MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13,
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MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14,
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MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15,
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MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16,
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MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17,
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MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18,
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MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19,
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MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20,
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MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21,
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MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22,
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MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23,
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};
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imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
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}
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static void lcd_enable(void)
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{
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struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
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/* Set LDB_DI0 as clock source for IPU_DI0 */
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clrsetbits_le32(&mxc_ccm->cscmr2,
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MXC_CCM_CSCMR2_DI0_CLK_SEL_MASK,
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MXC_CCM_CSCMR2_DI0_CLK_SEL(
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MXC_CCM_CSCMR2_DI0_CLK_SEL_LDB_DI0_CLK));
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/* Turn on IPU LDB DI0 clocks */
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setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_LDB_DI0(3));
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/* Turn on IPU DI0 clocks */
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setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_IPU_DI0(3));
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/* Configure LDB */
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writel(IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
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IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT |
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IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0,
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&iomux->gpr[2]);
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/* Enable backlights */
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pwm_init(1, 0, 0);
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/* duty cycle 5000000ns, period: 5000000ns */
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pwm_config(1, 5000000, 5000000);
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/* Backlight Power */
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gpio_request(BACKLIGHT_ENABLE, "BACKLIGHT_ENABLE");
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gpio_direction_output(BACKLIGHT_ENABLE, 1);
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pwm_enable(1);
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}
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static int do_lcd_enable(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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lcd_enable();
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return 0;
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}
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U_BOOT_CMD(
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ppd_lcd_enable, 1, 1, do_lcd_enable,
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"enable PPD LCD",
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"no parameters"
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);
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int board_video_skip(void)
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{
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int ret;
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ret = ipuv3_fb_init(&nv_spwg, 0, IPU_PIX_FMT_RGB24);
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if (ret)
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printf("Display cannot be configured: %d\n", ret);
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return ret;
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}
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