mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
board: ge: bx50v3, imx53ppd: use DM I2C
Remove old (pre-DM) i2c setup code. Enable DM i2c. Convert common code to use DM rtc. Convert common code to read VPD from eeprom partition. Convert the generic i2c PMIC init code to use the new da9063 driver. mx53ppd only: Correct RTC compatible in device tree. Enable MXC DM i2c driver. Define CONFIG_SYS_MALLOC_F_LEN so that DM is available in pre-reloc. Make GPIO banks available during preloc, since initialisation is done in board_early_init_f(). Add gpio_request() calls to satisfy the DM_GPIO compatibility API. Remove unused power configuration. Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Ian Ray <ian.ray@ge.com>
This commit is contained in:
Robert Beckett
Stefano Babic
parent
b64088c5c2
commit
1dec7fa797
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@ -26,3 +26,23 @@
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};
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};
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};
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&gpio1 {
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u-boot,dm-pre-reloc;
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};
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&gpio2 {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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&gpio4 {
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u-boot,dm-pre-reloc;
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};
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&gpio5 {
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u-boot,dm-pre-reloc;
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};
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@ -489,7 +489,7 @@
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reg = <1>;
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rtc@30 {
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compatible = "sii,s35390a";
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compatible = "sii,s35392a-rtc";
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reg = <0x30>;
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};
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@ -15,6 +15,4 @@ config SYS_SOC
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config SYS_CONFIG_NAME
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default "ge_bx50v3"
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source "board/ge/common/Kconfig"
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endif
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@ -14,7 +14,6 @@
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#include <linux/errno.h>
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#include <linux/libfdt.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/video.h>
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@ -27,7 +26,8 @@
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#include <asm/arch/crm_regs.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <i2c.h>
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#include <power/regulator.h>
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#include <power/da9063_pmic.h>
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#include <input.h>
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#include <pwm.h>
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#include <version.h>
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@ -85,45 +85,6 @@ static iomux_v3_cfg_t const uart4_pads[] = {
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MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static struct i2c_pads_info i2c_pad_info1 = {
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.scl = {
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.i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD,
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.gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | I2C_PAD,
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.gp = IMX_GPIO_NR(5, 27)
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},
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.sda = {
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.i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | I2C_PAD,
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.gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | I2C_PAD,
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.gp = IMX_GPIO_NR(5, 26)
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}
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};
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static struct i2c_pads_info i2c_pad_info2 = {
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.scl = {
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.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
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.gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
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.gp = IMX_GPIO_NR(4, 12)
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},
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.sda = {
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.i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
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.gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
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.gp = IMX_GPIO_NR(4, 13)
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}
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};
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static struct i2c_pads_info i2c_pad_info3 = {
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.scl = {
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.i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | I2C_PAD,
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.gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | I2C_PAD,
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.gp = IMX_GPIO_NR(1, 3)
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},
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.sda = {
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.i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | I2C_PAD,
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.gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | I2C_PAD,
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.gp = IMX_GPIO_NR(1, 6)
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}
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
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@ -491,10 +452,6 @@ static void set_confidx(const struct vpd_cache* vpd)
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int board_init(void)
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{
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
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setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
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if (!read_vpd(&vpd, vpd_callback)) {
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int ret, rescan;
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@ -541,53 +498,26 @@ static const struct boot_mode board_boot_modes[] = {
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void pmic_init(void)
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{
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#define I2C_PMIC 0x2
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#define DA9063_I2C_ADDR 0x58
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#define DA9063_REG_BCORE2_CFG 0x9D
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#define DA9063_REG_BCORE1_CFG 0x9E
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#define DA9063_REG_BPRO_CFG 0x9F
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#define DA9063_REG_BIO_CFG 0xA0
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#define DA9063_REG_BMEM_CFG 0xA1
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#define DA9063_REG_BPERI_CFG 0xA2
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#define DA9063_BUCK_MODE_MASK 0xC0
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#define DA9063_BUCK_MODE_MANUAL 0x00
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#define DA9063_BUCK_MODE_SLEEP 0x40
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#define DA9063_BUCK_MODE_SYNC 0x80
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#define DA9063_BUCK_MODE_AUTO 0xC0
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struct udevice *reg;
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int ret, i;
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static const char * const bucks[] = {
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"bcore1",
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"bcore2",
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"bpro",
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"bmem",
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"bio",
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"bperi",
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};
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uchar val;
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i2c_set_bus_num(I2C_PMIC);
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i2c_read(DA9063_I2C_ADDR, DA9063_REG_BCORE2_CFG, 1, &val, 1);
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val &= ~DA9063_BUCK_MODE_MASK;
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val |= DA9063_BUCK_MODE_SYNC;
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i2c_write(DA9063_I2C_ADDR, DA9063_REG_BCORE2_CFG, 1, &val, 1);
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i2c_read(DA9063_I2C_ADDR, DA9063_REG_BCORE1_CFG, 1, &val, 1);
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val &= ~DA9063_BUCK_MODE_MASK;
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val |= DA9063_BUCK_MODE_SYNC;
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i2c_write(DA9063_I2C_ADDR, DA9063_REG_BCORE1_CFG, 1, &val, 1);
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i2c_read(DA9063_I2C_ADDR, DA9063_REG_BPRO_CFG, 1, &val, 1);
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val &= ~DA9063_BUCK_MODE_MASK;
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val |= DA9063_BUCK_MODE_SYNC;
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i2c_write(DA9063_I2C_ADDR, DA9063_REG_BPRO_CFG, 1, &val, 1);
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i2c_read(DA9063_I2C_ADDR, DA9063_REG_BIO_CFG, 1, &val, 1);
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val &= ~DA9063_BUCK_MODE_MASK;
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val |= DA9063_BUCK_MODE_SYNC;
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i2c_write(DA9063_I2C_ADDR, DA9063_REG_BIO_CFG, 1, &val, 1);
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i2c_read(DA9063_I2C_ADDR, DA9063_REG_BMEM_CFG, 1, &val, 1);
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val &= ~DA9063_BUCK_MODE_MASK;
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val |= DA9063_BUCK_MODE_SYNC;
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i2c_write(DA9063_I2C_ADDR, DA9063_REG_BMEM_CFG, 1, &val, 1);
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i2c_read(DA9063_I2C_ADDR, DA9063_REG_BPERI_CFG, 1, &val, 1);
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val &= ~DA9063_BUCK_MODE_MASK;
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val |= DA9063_BUCK_MODE_SYNC;
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i2c_write(DA9063_I2C_ADDR, DA9063_REG_BPERI_CFG, 1, &val, 1);
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for (i = 0; i < ARRAY_SIZE(bucks); i++) {
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ret = regulator_get_by_devname(bucks[i], ®);
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if (reg < 0) {
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printf("%s(): Unable to get regulator %s: %d\n",
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__func__, bucks[i], ret);
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continue;
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}
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regulator_set_mode(reg, DA9063_BUCKMODE_SYNC);
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}
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}
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int board_late_init(void)
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@ -1,14 +0,0 @@
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config SYS_VPD_EEPROM_I2C_ADDR
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hex "I2C address of the EEPROM device used for VPD"
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help
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VPD = Vital Product Data
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config SYS_VPD_EEPROM_I2C_BUS
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int "I2C bus of the EEPROM device used for VPD."
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config SYS_VPD_EEPROM_SIZE
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int "Size in bytes of the EEPROM device used for VPD"
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config SYS_VPD_EEPROM_I2C_ADDR_LEN
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int "Number of bytes to use for VPD EEPROM address"
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default 1
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@ -5,27 +5,24 @@
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#include <common.h>
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#include <env.h>
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#include <i2c.h>
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#include <dm/uclass.h>
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#include <rtc.h>
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void check_time(void)
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{
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struct udevice *dev;
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int ret, i;
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struct rtc_time tm;
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u8 retry = 3;
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unsigned int current_i2c_bus = i2c_get_bus_num();
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ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
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if (ret < 0) {
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ret = uclass_get_device(UCLASS_RTC, 0, &dev);
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if (ret) {
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env_set("rtc_status", "FAIL");
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return;
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}
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rtc_init();
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for (i = 0; i < retry; i++) {
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ret = rtc_get(&tm);
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ret = dm_rtc_get(dev, &tm);
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if (!ret || ret == -EINVAL)
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break;
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}
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@ -40,7 +37,7 @@ void check_time(void)
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tm.tm_year = 2036;
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for (i = 0; i < retry; i++) {
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ret = rtc_set(&tm);
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ret = dm_rtc_set(dev, &tm);
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if (!ret)
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break;
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}
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@ -55,7 +52,5 @@ void check_time(void)
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env_set("rtc_status", "2038");
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else
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env_set("rtc_status", "OK");
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i2c_set_bus_num(current_i2c_bus);
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}
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@ -8,6 +8,9 @@
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#include <i2c.h>
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#include <linux/bch.h>
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#include <stdlib.h>
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#include <dm/uclass.h>
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#include <i2c_eeprom.h>
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#include <hexdump.h>
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/* BCH configuration */
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@ -200,28 +203,34 @@ int read_vpd(struct vpd_cache *cache,
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int (*process_block)(struct vpd_cache *, u8 id, u8 version,
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u8 type, size_t size, u8 const *data))
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{
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static const size_t size = CONFIG_SYS_VPD_EEPROM_SIZE;
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int res;
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struct udevice *dev;
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int ret;
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u8 *data;
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unsigned int current_i2c_bus = i2c_get_bus_num();
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int size;
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res = i2c_set_bus_num(CONFIG_SYS_VPD_EEPROM_I2C_BUS);
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if (res < 0)
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return res;
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ret = uclass_get_device_by_name(UCLASS_I2C_EEPROM, "vpd", &dev);
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if (ret)
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return ret;
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size = i2c_eeprom_size(dev);
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if (size < 0) {
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printf("Unable to get size of eeprom: %d\n", ret);
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return ret;
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}
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data = malloc(size);
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if (!data)
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return -ENOMEM;
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res = i2c_read(CONFIG_SYS_VPD_EEPROM_I2C_ADDR, 0,
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CONFIG_SYS_VPD_EEPROM_I2C_ADDR_LEN,
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data, size);
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if (res == 0)
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res = vpd_reader(size, data, cache, process_block);
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ret = i2c_eeprom_read(dev, 0, data, size);
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if (ret) {
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free(data);
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return ret;
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}
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ret = vpd_reader(size, data, cache, process_block);
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free(data);
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i2c_set_bus_num(current_i2c_bus);
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return res;
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return ret;
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}
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@ -13,6 +13,4 @@ config SYS_SOC
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config SYS_CONFIG_NAME
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default "mx53ppd"
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source "board/ge/common/Kconfig"
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endif
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@ -125,34 +125,6 @@ static void setup_iomux_fec(void)
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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}
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#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
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static void setup_iomux_i2c(void)
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{
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static const iomux_v3_cfg_t i2c1_pads[] = {
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NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
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}
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#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
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static struct i2c_pads_info i2c_pad_info1 = {
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.scl = {
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.i2c_mode = MX53_PAD_EIM_D21__I2C1_SCL | I2C_PAD,
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.gpio_mode = MX53_PAD_EIM_D28__GPIO3_28 | I2C_PAD,
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.gp = IMX_GPIO_NR(3, 28)
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},
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.sda = {
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.i2c_mode = MX53_PAD_EIM_D28__I2C1_SDA | I2C_PAD,
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.gpio_mode = MX53_PAD_EIM_D21__GPIO3_21 | I2C_PAD,
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.gp = IMX_GPIO_NR(3, 21)
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}
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};
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static int clock_1GHz(void)
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{
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int ret;
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@ -182,8 +154,10 @@ void ppd_gpio_init(void)
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int i;
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imx_iomux_v3_setup_multiple_pads(ppd_pads, ARRAY_SIZE(ppd_pads));
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for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i)
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for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i) {
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gpio_request(ppd_gpios[i].gpio, "request");
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gpio_direction_output(ppd_gpios[i].gpio, ppd_gpios[i].value);
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}
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}
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int board_early_init_f(void)
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@ -256,9 +230,6 @@ int board_init(void)
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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mxc_set_sata_internal_clock();
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setup_iomux_i2c();
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setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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return 0;
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}
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|
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@ -104,6 +104,7 @@ static void lcd_enable(void)
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pwm_config(1, 5000000, 5000000);
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/* Backlight Power */
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gpio_request(BACKLIGHT_ENABLE, "BACKLIGHT_ENABLE");
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gpio_direction_output(BACKLIGHT_ENABLE, 1);
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pwm_enable(1);
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|
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@ -2,9 +2,6 @@ CONFIG_ARM=y
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CONFIG_ARCH_MX6=y
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CONFIG_SYS_TEXT_BASE=0x17800000
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CONFIG_SYS_MALLOC_F_LEN=0x4000
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CONFIG_SYS_VPD_EEPROM_I2C_ADDR=0x50
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CONFIG_SYS_VPD_EEPROM_I2C_BUS=4
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CONFIG_SYS_VPD_EEPROM_SIZE=1024
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CONFIG_TARGET_GE_BX50V3=y
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_SECT_SIZE=0x10000
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@ -51,6 +48,12 @@ CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_BOOTCOUNT_EXT=y
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CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
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CONFIG_DM_MMC=y
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CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_MXC=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_PCA954x=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_MTD=y
|
||||
|
|
@ -71,6 +74,12 @@ CONFIG_DM_PCI=y
|
|||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_IMX6=y
|
||||
CONFIG_PWM_IMX=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_DM_PMIC_DA9063=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_DA9063=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_RTC_RX8010SJ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_MXC_SPI=y
|
||||
|
|
|
|||
|
|
@ -2,9 +2,6 @@ CONFIG_ARM=y
|
|||
CONFIG_ARCH_MX5=y
|
||||
CONFIG_SYS_TEXT_BASE=0x77800000
|
||||
CONFIG_TARGET_MX53PPD=y
|
||||
CONFIG_SYS_VPD_EEPROM_I2C_ADDR=0x50
|
||||
CONFIG_SYS_VPD_EEPROM_I2C_BUS=2
|
||||
CONFIG_SYS_VPD_EEPROM_SIZE=1024
|
||||
CONFIG_ENV_SIZE=0x2800
|
||||
CONFIG_ENV_OFFSET=0xC0000
|
||||
CONFIG_BOOTCOUNT_BOOTLIMIT=10
|
||||
|
|
@ -41,6 +38,13 @@ CONFIG_DM=y
|
|||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_BOOTCOUNT_EXT=y
|
||||
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5"
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_MXC=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_PCA954x=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_FSL_ESDHC_IMX=y
|
||||
CONFIG_MTD=y
|
||||
|
|
@ -49,6 +53,7 @@ CONFIG_PINCTRL=y
|
|||
CONFIG_PINCTRL_IMX5=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_PWM_IMX=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_RTC_S35392A=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_WATCHDOG=y
|
||||
|
|
@ -60,3 +65,4 @@ CONFIG_VIDEO=y
|
|||
# CONFIG_VIDEO_SW_CURSOR is not set
|
||||
CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
|
||||
CONFIG_IMX_WATCHDOG=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x4000
|
||||
|
|
|
|||
|
|
@ -189,33 +189,6 @@
|
|||
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
|
||||
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
|
||||
|
||||
#define CONFIG_RTC_RX8010SJ
|
||||
#define CONFIG_SYS_RTC_BUS_NUM 2
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x32
|
||||
|
||||
/* I2C Configs */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_MXC
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_MXC_I2C1
|
||||
#define CONFIG_SYS_I2C_MXC_I2C2
|
||||
#define CONFIG_SYS_I2C_MXC_I2C3
|
||||
|
||||
#define CONFIG_SYS_NUM_I2C_BUSES 11
|
||||
#define CONFIG_SYS_I2C_MAX_HOPS 1
|
||||
#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
|
||||
{1, {I2C_NULL_HOP} }, \
|
||||
{2, {I2C_NULL_HOP} }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
|
||||
}
|
||||
|
||||
#define CONFIG_BCH
|
||||
|
||||
#endif /* __GE_BX50V3_CONFIG_H */
|
||||
|
|
|
|||
|
|
@ -43,25 +43,6 @@
|
|||
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
||||
#define CONFIG_MXC_USB_FLAGS 0
|
||||
|
||||
#define CONFIG_SYS_RTC_BUS_NUM 2
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x30
|
||||
|
||||
/* I2C Configs */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_MXC
|
||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
||||
|
||||
/* PMIC Controller */
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_DIALOG_POWER
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_POWER_FSL_MC13892
|
||||
#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
|
||||
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
|
@ -188,22 +169,6 @@
|
|||
#define CONFIG_CMD_FUSE
|
||||
#define CONFIG_FSL_IIM
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
|
||||
/* I2C1 */
|
||||
#define CONFIG_SYS_NUM_I2C_BUSES 9
|
||||
#define CONFIG_SYS_I2C_MAX_HOPS 1
|
||||
#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
|
||||
{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
|
||||
}
|
||||
|
||||
#define CONFIG_BCH
|
||||
|
||||
/* Backlight Control */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user