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https://github.com/brain-hackers/u-boot-brain
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f660f7af1d
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
138 lines
2.4 KiB
Plaintext
138 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* NXP LX2160ARDB device tree source
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*
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* Author: Priyanka Jain <priyanka.jain@nxp.com>
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* Sriram Dash <sriram.dash@nxp.com>
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*
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* Copyright 2018 NXP
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*
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*/
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/dts-v1/;
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#include "fsl-lx2160a.dtsi"
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/ {
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model = "NXP Layerscape LX2160ARDB Board";
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compatible = "fsl,lx2160ardb", "fsl,lx2160a";
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aliases {
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spi0 = &fspi;
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};
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};
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&dpmac3 {
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status = "okay";
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phy-handle = <&aquantia_phy1>;
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phy-connection-type = "usxgmii";
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};
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&dpmac4 {
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status = "okay";
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phy-handle = <&aquantia_phy2>;
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phy-connection-type = "usxgmii";
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};
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&dpmac17 {
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status = "okay";
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phy-handle = <&rgmii_phy1>;
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phy-connection-type = "rgmii-id";
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};
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&dpmac18 {
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status = "okay";
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phy-handle = <&rgmii_phy2>;
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phy-connection-type = "rgmii-id";
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};
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&emdio1 {
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status = "okay";
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rgmii_phy1: ethernet-phy@1 {
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/* AR8035 PHY - "compatible" property not strictly needed */
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compatible = "ethernet-phy-id004d.d072";
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reg = <0x1>;
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/* Poll mode - no "interrupts" property defined */
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};
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rgmii_phy2: ethernet-phy@2 {
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/* AR8035 PHY - "compatible" property not strictly needed */
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compatible = "ethernet-phy-id004d.d072";
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reg = <0x2>;
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/* Poll mode - no "interrupts" property defined */
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};
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aquantia_phy1: ethernet-phy@4 {
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/* AQR107 PHY - "compatible" property not strictly needed */
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compatible = "ethernet-phy-ieee802.3-c45";
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x4>;
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};
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aquantia_phy2: ethernet-phy@5 {
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/* AQR107 PHY - "compatible" property not strictly needed */
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compatible = "ethernet-phy-ieee802.3-c45";
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x5>;
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};
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};
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&esdhc0 {
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status = "okay";
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};
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&esdhc1 {
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status = "okay";
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mmc-hs200-1_8v;
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};
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&fspi {
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status = "okay";
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mt35xu512aba0: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi-rx-bus-width = <8>;
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spi-tx-bus-width = <1>;
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};
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mt35xu512aba1: flash@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <1>;
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spi-rx-bus-width = <8>;
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spi-tx-bus-width = <1>;
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};
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};
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&i2c0 {
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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&i2c4 {
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status = "okay";
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rtc@51 {
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compatible = "pcf2127-rtc";
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reg = <0x51>;
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};
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};
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&sata0 {
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status = "okay";
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};
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&sata1 {
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status = "okay";
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};
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&sata2 {
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status = "okay";
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};
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&sata3 {
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status = "okay";
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};
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