brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity

arm: dts: lx2160ardb: add DPMAC and PHY nodes

Browse Source 
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.

Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and
the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their
associated PHY.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Ioana Ciornei 2020-03-18 16:47:44 +02:00 committed by Priyanka Jain
parent a369ee3364
commit f660f7af1d
2 changed files with 97 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

52
arch/arm/dts/fsl-lx2160a-rdb.dts
View File

@ -21,6 +21,58 @@
};
};
&dpmac3 {
status = "okay";
phy-handle = <&aquantia_phy1>;
phy-connection-type = "usxgmii";
};
&dpmac4 {
status = "okay";
phy-handle = <&aquantia_phy2>;
phy-connection-type = "usxgmii";
};
&dpmac17 {
status = "okay";
phy-handle = <&rgmii_phy1>;
phy-connection-type = "rgmii-id";
};
&dpmac18 {
status = "okay";
phy-handle = <&rgmii_phy2>;
phy-connection-type = "rgmii-id";
};
&emdio1 {
status = "okay";
rgmii_phy1: ethernet-phy@1 {
/* AR8035 PHY - "compatible" property not strictly needed */
compatible = "ethernet-phy-id004d.d072";
reg = <0x1>;
/* Poll mode - no "interrupts" property defined */
};
rgmii_phy2: ethernet-phy@2 {
/* AR8035 PHY - "compatible" property not strictly needed */
compatible = "ethernet-phy-id004d.d072";
reg = <0x2>;
/* Poll mode - no "interrupts" property defined */
};
aquantia_phy1: ethernet-phy@4 {
/* AQR107 PHY - "compatible" property not strictly needed */
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x4>;
};
aquantia_phy2: ethernet-phy@5 {
/* AQR107 PHY - "compatible" property not strictly needed */
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x5>;
};
};
&esdhc0 {
status = "okay";
};

45
arch/arm/dts/fsl-lx2160a.dtsi
View File

@ -364,6 +364,51 @@
ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>;
};
fsl_mc: fsl-mc@80c000000 {
compatible = "fsl,qoriq-mc", "simple-mfd";
reg = <0x00000008 0x0c000000 0 0x40>,
<0x00000000 0x08340000 0 0x40000>;
#address-cells = <3>;
#size-cells = <1>;
/*
* Region type 0x0 - MC portals
* Region type 0x1 - QBMAN portals
*/
ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
dpmacs {
compatible = "simple-mfd";
#address-cells = <1>;
#size-cells = <0>;
dpmac3: dpmac@3 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x3>;
status = "disabled";
};
dpmac4: dpmac@4 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x4>;
status = "disabled";
};
dpmac17: dpmac@11 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x11>;
status = "disabled";
};
dpmac18: dpmac@12 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0x12>;
status = "disabled";
};
};
};
/* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
emdio1: mdio@8b96000 {
compatible = "fsl,ls-mdio";