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https://github.com/brain-hackers/u-boot-brain
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![Marek Vasut](/assets/img/avatar_default.png)
Different versions of the SDHI core use either bit 17 or bit 20 for the DTRAEND indication, which can differ even between SoC revisions. Make the DTRAEND bit position part of the driver private data, so that the probe function can set this accordingly. Set this to 20 on Socionext SoCs and either 17 or 20 on Renesas SoCs, depending on the SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
89 lines
1.9 KiB
C
89 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <common.h>
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#include <clk.h>
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#include <fdtdec.h>
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#include <mmc.h>
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#include <dm.h>
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#include <linux/compat.h>
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#include <linux/dma-direction.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#include <power/regulator.h>
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#include <asm/unaligned.h>
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#include "tmio-common.h"
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static const struct dm_mmc_ops uniphier_sd_ops = {
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.send_cmd = tmio_sd_send_cmd,
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.set_ios = tmio_sd_set_ios,
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.get_cd = tmio_sd_get_cd,
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};
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static const struct udevice_id uniphier_sd_match[] = {
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{ .compatible = "socionext,uniphier-sd-v2.91" },
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{ .compatible = "socionext,uniphier-sd-v3.1" },
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{ .compatible = "socionext,uniphier-sd-v3.1.1" },
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{ /* sentinel */ }
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};
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static ulong uniphier_sd_clk_get_rate(struct tmio_sd_priv *priv)
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{
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#if CONFIG_IS_ENABLED(CLK)
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return clk_get_rate(&priv->clk);
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#elif CONFIG_SPL_BUILD
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return 100000000;
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#else
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return 0;
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#endif
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}
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static int uniphier_sd_probe(struct udevice *dev)
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{
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struct tmio_sd_priv *priv = dev_get_priv(dev);
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priv->clk_get_rate = uniphier_sd_clk_get_rate;
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priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
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#ifndef CONFIG_SPL_BUILD
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int ret;
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ret = clk_get_by_index(dev, 0, &priv->clk);
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if (ret < 0) {
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dev_err(dev, "failed to get host clock\n");
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return ret;
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}
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/* set to max rate */
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ret = clk_set_rate(&priv->clk, ULONG_MAX);
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if (ret < 0) {
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dev_err(dev, "failed to set rate for host clock\n");
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clk_free(&priv->clk);
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return ret;
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}
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ret = clk_enable(&priv->clk);
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if (ret) {
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dev_err(dev, "failed to enable host clock\n");
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return ret;
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}
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#endif
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return tmio_sd_probe(dev, 0);
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}
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U_BOOT_DRIVER(uniphier_mmc) = {
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.name = "uniphier-mmc",
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.id = UCLASS_MMC,
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.of_match = uniphier_sd_match,
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.bind = tmio_sd_bind,
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.probe = uniphier_sd_probe,
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.priv_auto_alloc_size = sizeof(struct tmio_sd_priv),
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.platdata_auto_alloc_size = sizeof(struct tmio_sd_plat),
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.ops = &uniphier_sd_ops,
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};
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