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mmc: tmio: Make DMA transfer end bit configurable

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Different versions of the SDHI core use either bit 17 or bit 20 for the
DTRAEND indication, which can differ even between SoC revisions. Make
the DTRAEND bit position part of the driver private data, so that the
probe function can set this accordingly. Set this to 20 on Socionext
SoCs and either 17 or 20 on Renesas SoCs, depending on the SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Marek Vasut 2019-01-11 23:45:54 +01:00 committed by Marek Vasut
parent 97276a91db
commit 992bcf4f27
4 changed files with 15 additions and 5 deletions
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10
drivers/mmc/renesas-sdhi.c
View File

@ -462,6 +462,16 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
priv->nrtaps = 4;
else
priv->nrtaps = 8;
/* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */
if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 1)) ||
((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) &&
(rmobile_get_cpu_rev_fraction() == 0)))
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
else
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
}
static int renesas_sdhi_probe(struct udevice *dev)

8
drivers/mmc/tmio-common.c
View File

@ -347,12 +347,10 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct mmc_data *data)
/*
* The DMA READ completion flag position differs on Socionext
* and Renesas SoCs. It is bit 20 on Socionext SoCs and using
* bit 17 is a hardware bug and forbidden. It is bit 17 on
* Renesas SoCs and bit 20 does not work on them.
* bit 17 is a hardware bug and forbidden. It is either bit 17
* or bit 20 on Renesas SoCs, depending on SoC.
*/
poll_flag = (priv->caps & TMIO_SD_CAP_RCAR) ?
TMIO_SD_DMA_INFO1_END_RD :
TMIO_SD_DMA_INFO1_END_RD2;
poll_flag = priv->read_poll_flag;
tmp |= TMIO_SD_DMA_MODE_DIR_RD;
} else {
buf = (void *)data->src;

1
drivers/mmc/tmio-common.h
View File

@ -119,6 +119,7 @@ struct tmio_sd_priv {
void __iomem *regbase;
unsigned int version;
u32 caps;
u32 read_poll_flag;
#define TMIO_SD_CAP_NONREMOVABLE BIT(0) /* Nonremovable e.g. eMMC */
#define TMIO_SD_CAP_DMA_INTERNAL BIT(1) /* have internal DMA engine */
#define TMIO_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */

1
drivers/mmc/uniphier-sd.c
View File

@ -47,6 +47,7 @@ static int uniphier_sd_probe(struct udevice *dev)
struct tmio_sd_priv *priv = dev_get_priv(dev);
priv->clk_get_rate = uniphier_sd_clk_get_rate;
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
#ifndef CONFIG_SPL_BUILD
int ret;