Green Wan bc8bbb77f7 riscv: cpu: fu740: clear feature disable CSR ... Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>		2021-05-05 16:11:27 +08:00
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cpu	riscv: cpu: fu740: clear feature disable CSR	2021-05-05 16:11:27 +08:00
dts	riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodes	2021-04-08 15:37:30 +08:00
include/asm	lmb: move CONFIG_LMB in Kconfig	2021-04-22 14:09:45 -04:00
lib	Add support for stack-protector	2021-04-20 07:31:12 -04:00
config.mk	kconfig / kbuild: Re-sync with Linux 4.19	2020-04-10 11:18:32 -04:00
Kconfig	riscv: assembler versions of memcpy, memmove, memset	2021-04-08 15:37:29 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00