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https://github.com/brain-hackers/u-boot-brain
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0ea3671d35
Pin mux logic has 2 options in priority order, one is through RCW_SRC and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic takes the priority for SPI pads and do not allow RCW_BASE and SPI_EXT to control the SPI muxing. But actually those are DSPI controller's pads instead of QSPI controller's, so this workaround allows RCW fields SPI_BASE and SPI_EXT to control relevant pads muxing. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com> |
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.. | ||
fsl-layerscape | ||
hisilicon | ||
s32v234 | ||
zynqmp | ||
cache_v8.c | ||
cache.S | ||
config.mk | ||
cpu-dt.c | ||
cpu.c | ||
exceptions.S | ||
fwcall.c | ||
generic_timer.c | ||
Kconfig | ||
Makefile | ||
sec_firmware_asm.S | ||
sec_firmware.c | ||
spin_table_v8.S | ||
spin_table.c | ||
start.S | ||
tlb.S | ||
transition.S | ||
u-boot-spl.lds | ||
u-boot.lds |