Hou Zhiqiang 0ea3671d35 armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539 ... Pin mux logic has 2 options in priority order, one is through RCW_SRC and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic takes the priority for SPI pads and do not allow RCW_BASE and SPI_EXT to control the SPI muxing. But actually those are DSPI controller's pads instead of QSPI controller's, so this workaround allows RCW fields SPI_BASE and SPI_EXT to control relevant pads muxing. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>		2016-10-06 09:57:36 -07:00
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arm11	ARM: Move SYS_CACHELINE_SIZE over to Kconfig	2016-08-26 17:04:46 -04:00
arm720t	ARM: ARM720t: remove empty asm/arch/hardware.h	2015-04-23 08:52:27 -04:00
arm920t	arch, board: squash lines for immediate return	2016-09-23 17:53:53 -04:00
arm926ejs	treewide: replace #include <asm/errno.h> with <linux/errno.h>	2016-09-23 17:55:42 -04:00
arm946es	arm: Allow skipping of low-level init with I-cache on	2016-06-12 23:49:38 +02:00
arm1136	treewide: replace #include <asm/errno.h> with <linux/errno.h>	2016-09-23 17:55:42 -04:00
arm1176	ARM: start.S: fix typo	2016-02-29 14:49:35 -05:00
armv7	armv7: LS1021a: enable i-cache in start.S	2016-10-06 09:55:08 -07:00
armv7m	stm32: Add SDRAM support for stm32f746 discovery board	2016-07-14 18:22:43 -04:00
armv8	armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539	2016-10-06 09:57:36 -07:00
pxa	ARM: Move SYS_CACHELINE_SIZE over to Kconfig	2016-08-26 17:04:46 -04:00
sa1100	arch, board: squash lines for immediate return	2016-09-23 17:53:53 -04:00
Makefile	Various Makefiles: Add SPDX-License-Identifier tags	2015-11-10 09:19:52 -05:00
u-boot-spl.lds	spl: arm: Make sure to include all of the u_boot_list entries	2016-03-16 15:27:55 -04:00
u-boot.lds	ARM: armv7: guard memory reserve for PSCI with #ifdef CONFIG_ARMV7_PSCI	2016-09-07 08:48:46 -04:00