Peng Fan 0e81982de0 imx: mx6: fix mmdc ch0 clk for 6SL ... >From RM, per_periph2_clk_sel option3 is: "derive clock from 198MHz clock (divided 392MHz PLL2 PFD)." So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>		2016-12-16 11:38:24 +01:00
..
clock.c	imx: mx6: fix mmdc ch0 clk for 6SL	2016-12-16 11:38:24 +01:00
ddr.c	ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routines	2016-11-29 16:40:37 +01:00
Kconfig	board/liteboard: Add support for liteBoard	2016-12-16 10:31:13 +01:00
Makefile	imx: hab: rework secure boot support for imx6	2015-10-30 15:20:57 +01:00
mp.c	treewide: replace #include <asm/errno.h> with <linux/errno.h>	2016-09-23 17:55:42 -04:00
soc.c	imx: mx6ull: update the REFTOP_VBGADJ setting	2016-11-16 20:53:55 +01:00