Anup Patel fdff1f96a6 riscv: Rename cpu/qemu to cpu/generic ... The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2019-02-27 09:12:33 +08:00
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Kconfig	riscv: Rename cpu/qemu to cpu/generic	2019-02-27 09:12:33 +08:00
MAINTAINERS	riscv: Add S-mode defconfigs for QEMU virt machine	2018-12-05 14:14:04 +08:00
Makefile	riscv: Add QEMU virt board support	2018-10-03 17:48:37 +08:00
qemu-riscv.c	riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL	2018-11-26 13:57:33 +08:00