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u-boot-brain/drivers/ram/k3-ddrss/32bit
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Dave Gerlach a8c13c777e ram: k3-ddrss: Introduce common driver with J7 SoC support 
Introduce a new version of the ddr driver which has the ability to
support different variations of the controller. Also introduce support
for the 32bit variation of the controller which is what was already
supported by the previous version used for J721e and J7200.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:30:52 +05:30
..
lpddr4_32bit_if.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_32bit_obj_if.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_32bit_structs_if.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_address_slice_0_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_ctl_regs_rw_masks.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_ctl_regs.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_data_slice_1_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_data_slice_2_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_data_slice_3_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_data_slice_0_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_ddr_controller_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_phy_core_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30
lpddr4_pi_macros.h ram: k3-ddrss: Introduce common driver with J7 SoC support 2021-05-12 16:30:52 +05:30