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https://github.com/brain-hackers/u-boot-brain
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ba932bc846
Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 lines
160 B
Makefile
9 lines
160 B
Makefile
#
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# Copyright (C) 2017 Renesas Electronics
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# Copyright (C) 2017 Chris Brandt
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#
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# SPDX-License-Identifier: GPL-2.0+
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obj-y := grpeach.o
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obj-y += lowlevel_init.o
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