u-boot-brain/arch/arm/dts/zynq-cse-nor.dts
Michal Simek f7375aff95 ARM: zynq: Enable DM for CFI NOR flash
With multi defconfig NOR flash information about NOR should be taken from
DT that's why there is no reason to specify address and sizes via fixed
config.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00

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// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx CSE NOR board DTS
*
* Copyright (C) 2018 Xilinx, Inc.
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Zynq CSE NOR Board";
compatible = "xlnx,zynq-cse-nor", "xlnx,zynq-7000";
aliases {
serial0 = &dcc;
};
memory@fffc0000 {
device_type = "memory";
reg = <0xFFFC0000 0x40000>;
};
chosen {
stdout-path = "serial0:115200n8";
};
dcc: dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
amba: amba {
u-boot,dm-pre-reloc;
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
slcr: slcr@f8000000 {
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
reg = <0xF8000000 0x1000>;
ranges;
clkc: clkc@100 {
u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
clock-output-names = "armpll", "ddrpll",
"iopll", "cpu_6or4x",
"cpu_3or2x", "cpu_2x", "cpu_1x",
"ddr2x", "ddr3x", "dci",
"lqspi", "smc", "pcap", "gem0",
"gem1", "fclk0", "fclk1",
"fclk2", "fclk3", "can0",
"can1", "sdio0", "sdio1",
"uart0", "uart1", "spi0",
"spi1", "dma", "usb0_aper",
"usb1_aper", "gem0_aper",
"gem1_aper", "sdio0_aper",
"sdio1_aper", "spi0_aper",
"spi1_aper", "can0_aper",
"can1_aper", "i2c0_aper",
"i2c1_aper", "uart0_aper",
"uart1_aper", "gpio_aper",
"lqspi_aper", "smc_aper",
"swdt", "dbg_trc", "dbg_apb";
reg = <0x100 0x100>;
};
};
/*
* This is partially hack because it is normally subnode of smcc
* but for mini U-Boot there is no reason to enable SMCC driver
* which does almost nothing in NOR flash configuration that's
* why place cfi-flash directly here.
*/
flash@e2000000 {
u-boot,dm-pre-reloc;
compatible = "cfi-flash";
reg = <0xe2000000 0x2000000>;
#address-cells = <1>;
#size-cells = <1>;
};
};
};
&dcc {
status = "okay";
};