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https://github.com/brain-hackers/u-boot-brain
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ec55a1df39
AST2600 is the 7th generation of Aspeed SoC designated for Interated Remote Management Processor. AST2600 has significant performance improvement by integrating 1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the controllers are also improved with more features and better performance than preceding AST24xx/AST25xx. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
180 lines
2.9 KiB
Plaintext
180 lines
2.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/dts-v1/;
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#include "ast2600-u-boot.dtsi"
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/ {
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000>;
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};
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chosen {
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stdout-path = &uart5;
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};
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aliases {
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mmc0 = &emmc_slot0;
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mmc1 = &sdhci_slot0;
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mmc2 = &sdhci_slot1;
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spi0 = &fmc;
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spi1 = &spi1;
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spi2 = &spi2;
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ethernet0 = &mac0;
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ethernet1 = &mac1;
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ethernet2 = &mac2;
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ethernet3 = &mac3;
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};
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cpus {
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cpu@0 {
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clock-frequency = <800000000>;
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};
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cpu@1 {
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clock-frequency = <800000000>;
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};
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};
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};
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&uart5 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&sdrammc {
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clock-frequency = <400000000>;
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};
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&wdt1 {
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status = "okay";
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};
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&fmc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fmcquad_default>;
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flash@0 {
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compatible = "spi-flash", "sst,w25q256";
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status = "okay";
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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};
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flash@1 {
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compatible = "spi-flash", "sst,w25q256";
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status = "okay";
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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};
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flash@2 {
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compatible = "spi-flash", "sst,w25q256";
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status = "okay";
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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};
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};
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&spi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
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&pinctrl_spi1cs1_default &pinctrl_spi1wp_default
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&pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
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flash@0 {
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compatible = "spi-flash", "sst,w25q256";
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status = "okay";
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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};
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};
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&spi2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
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&pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
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flash@0 {
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compatible = "spi-flash", "sst,w25q256";
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status = "okay";
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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};
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};
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&emmc {
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u-boot,dm-pre-reloc;
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timing-phase = <0x700ff>;
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};
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&emmc_slot0 {
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u-boot,dm-pre-reloc;
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status = "okay";
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_emmc_default>;
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sdhci-drive-type = <1>;
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};
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&i2c4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c5_default>;
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};
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&i2c5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c6_default>;
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};
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&i2c6 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c7_default>;
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};
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&i2c7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c8_default>;
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};
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&i2c8 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c9_default>;
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};
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&scu {
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mac0-clk-delay = <0x1d 0x1c
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0x10 0x17
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0x10 0x17>;
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mac1-clk-delay = <0x1d 0x10
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0x10 0x10
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0x10 0x10>;
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mac2-clk-delay = <0x0a 0x04
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0x08 0x04
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0x08 0x04>;
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mac3-clk-delay = <0x0a 0x04
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0x08 0x04
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0x08 0x04>;
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};
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