Commit Graph

19873 Commits

Author SHA1 Message Date
Albert ARIBAUD
fed029f3c3 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2013-04-04 15:44:57 +02:00
Minkyu Kang
4fdebefa45 exynos: change indentation of defines in cpu.h
Fix the indentation of some defines by tab.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-04 20:17:50 +09:00
Albert ARIBAUD
be08abc242 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-04-04 11:49:32 +02:00
Dirk Behme
d36b39bf0d spi: mxc_spi: Fix ECSPI reset handling
Reviewing the ECSPI reset handling shows two issues:

1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg
   (ECSPIx_CONGREG) the i.MX6 technical reference manual states:

   -- cut --
   ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block
   and resets the internal logic with the exception of the ECSPI_CONREG.
   -- cut --

   Note the exception mentioned: The CONREG itself isn't reset.

   Fix this by manually writing the reset value 0 to the whole register.
   This sets the EN bit to zero, too (i.e. includes the old
   ~MXC_CSPICTRL_EN).

2. We want to reset the whole SPI block here. So it makes no sense
   to first read the old value of the CONREG and write it back, later.
   This will give us the old (historic/random) value of the CONREG back.
   And doesn't reset the CONREG.

   To get a clean CONREG after the reset of the block, too, don't use
   the old (historic/random) value of the CONREG while doing the reset.
   And read the clean CONREG after the reset.

This was found while working on a SPI boot device where the i.MX6 boot
ROM has already initialized the SPI block. The initialization by the
boot ROM might be different to what the U-Boot driver wants to configure.
I.e. we need a clean reset of SPI block, including the CONREG.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-04 10:23:09 +02:00
Stephen Warren
5eaa215607 ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer
driver to conform to this.

Have the timer implementation export a custom API get_timer_us() for use
by the BCM2835 MMC API, which needs us resolution for a HW workaround.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-04-04 08:14:54 +02:00
Javier Martinez Canillas
7a3f481c6d i.MX6: mx6qsabrelite: README: don't pass chip-select to sf probe command
board/freescale/mx6qsabrelite/README explain a procedure to
update the SPI-NOR on the SabreLite board without Freescale
manufacturing tool but following this procedure leads to both
"sf erase" and "sf write" failing on a mx6qsabrelite board:

MX6QSABRELITE U-Boot > sf probe 1
MX6QSABRELITE U-Boot > sf erase 0 0x40000
SPI flash erase failed
MX6QSABRELITE U-Boot > sf write 0x10800000 0 0x40000
SPI flash write failed

This is because the chip-select 1 is wrong and the correct
value is 0x7300.

Since commit c1173bd0 ("sf command: allow default bus and chip selects")
the chip-select and bus arguments for the sf probe command are optional
so let's just remove it and use "sf probe" instead.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
2013-04-03 12:15:17 +02:00
Fabio Estevam
d8e9eb9c04 wandboard: Remove CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_USDHC_NUM is not used for wandboard.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 11:40:44 +02:00
Fabio Estevam
773d56d40d mx6qsabrelite: Remove duplicate 'mmc dev'
No need to call 'mmc dev' twice.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 11:40:44 +02:00
Fabio Estevam
69089245c2 wandboard: Remove duplicate 'mmc dev'
No need to call 'mmc dev' twice.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 11:40:44 +02:00
Fabio Estevam
38e7007725 mx6: Fix get_board_rev() for the mx6 solo case
When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev()
returns 0x62xxx, which is not a value understood by the VPU
(Video Processing Unit) library in the kernel and causes the video playback to
fail.

The expected values for get_board_rev are:
0x63xxx: For mx6quad/dual
0x61xxx: For mx6dual-lite/solo

So adjust get_board_rev() accordingly and make it as weak function, so that we
do not need to define it in every mx6 board file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-04-03 11:36:34 +02:00
Alexandre Pereira da Silva
50cea244fe mx23_olinuxino: Fix netboot console
The netargs variable was referencing the non-existing variable
console_mainline. Change that to console variable instead.

Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 11:28:40 +02:00
Abbas Raza
aad4659a2f mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by a board
Maximum bus width supported by some i.MX6 boards is not 8bit like
others. In case where both host controller and card support 8bit transfers,
they agree to communicate on 8bit interface while some boards support only 4bit interface.
Due to this reason the mmc 8bit default mode fails on these boards. To rectify this,
define maximum bus width supported by these boards (4bit). If max_bus_width is not
defined, it is 0 by default and 8bit width support will be enabled in host
capabilities otherwise host capabilities are modified accordingly.

It is tested with a MMCplus card.

Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com>
cc: stefano Babic <sbabic@denx.de>
cc: Andy Fleming <afleming@gmail.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2013-04-03 11:26:28 +02:00
Otavio Salvador
2feae93ac0 mx23_olinuxino: Change definitions to use spaces instead of tabs
Change all "#define/ifdef<TAB>" sequences into "#define/ifdef<SPACE>".

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 11:26:12 +02:00
Benoît Thébaudeau
d37b33481d mx25pdk: Enable imxdi RTC
The mx25pdk board supports the i.MX25 DryIce RTC (imxdi), so enable it. This
allows to compile-test the imxdi driver in the mainline tree.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-03 11:26:12 +02:00
Fabio Estevam
55600288ab mx6qsabrelite: README: No need to pass 'u-boot.imx'
The u-boot.imx binary is generated by default, so no need to pass it in the
'make' line.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-03 10:57:42 +02:00
Fabio Estevam
ab461be65d mx28evk: Introduce a new target for saving env vars to NAND
Introduce 'mx28evk_nand' target for saving environment variables into NAND.

The mx28evk board does not come with a NAND flash populated from the
factory. It comes with an empty slot (U23), which allows the insertion of a
48-pin TSOP flash device.

Tested with a K9LBG08U0D.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 10:55:18 +02:00
Otavio Salvador
85449dbd4b mx6qsabre{sd,auto}: Add boot mode select
Adds support for 'bmode' command which let user to choose where to
boot from; this allows U-Boot to load system from another storage
without messing with jumpers.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 10:41:51 +02:00
Otavio Salvador
60bb462148 mx6qsabresd: Fix card detection for invalid card id case
This changes the code so in case an unkown value is passed it will
return as invalid.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 10:41:28 +02:00
Otavio Salvador
28ff917c28 mx6qsabresd: Document the mapping of USDHC[2-4]
This documents the SD card identifier so it is easier for user to spot
which card number will be used, if need.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-04-03 10:40:13 +02:00
Akshay Saraswat
07cd5c7495 Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk
As we shall now be using clock_get_periph_rate function.
We find no reason for keeping code in function exynos5_get_pwm_clk.
Hence, removing it.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Padmavathi Venna
e2338704c0 Exynos: pwm: Use generic api to get pwm clk freq
Use generic api to get the pwm clock frequency

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Padmavathi Venna
f9e4d046e0 Exynos: clock: Correct pwm source clk selection
MPLL is selected as the source clk of pwm by default

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Padmavathi Venna
12a46a384d Exynos: clock: Add generic api to get the clk freq
Add generic api to get the frequency of the required peripherial. This
API gets the source clock frequency and returns the required frequency
by dividing with first and second dividers based on the requirement.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Padmavathi Venna
394d64e45b Exynos: Add peripherial id for pwm
Add peripherial id for pwm inorder to support
generic api to get the clk frequency

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Gabe Black
92809eeed2 Exynos: Tidy up the pwm_config function in the exynos pwm driver
Some small fixes in the exynos pwm driver:

1. NS_IN_HZ is non-sensical since these are not compatible units. This
constant actually describes the number of nanoseconds in a second. Renamed it
to NS_IN_SEC. Also dropped the unnecessary parenthesis.
2. The variable "period" is not used to hold a period, it's used to hold a
frequency. Renamed it to "frequency".
3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if
which checks that condition will never execute. Also, there should be no
problem if the pwm never switches, so there's no reason to subtract one from
tcmp and therefore no reason to compare it against zero. Removed both ifs. If
they weren't removed, tcmp should be a signed value.
4. Add a check for a 0 period.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Gabe Black
34b5ee1f6a Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4
The pwm_config function in the exynos pwm driver divides by its period
period parameter. A function was calling pwm_config with a 0ns period and a
0ns duty cycle. That doesn't actually make any sense physically, and results
in a divide by zero in the driver. This change changes the parameters to be a
100000ns period and duty cycle.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Gabe Black
c059f274ad Exynos: pwm: Fix two bugs in the exynos pwm configuration code
First, the "div" value was being used incorrectly to compute the frequency of
the PWM timer. The value passed in is a constant which reflects the value
that would be found in a configuration register, 0 to 4. That should
correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was
being used instead.

Second, the reset value of the timers were being calculated to give an overall
frequency, thrown out, and set to a maximum value. This was done so that PWM 4
could be used as the system clock by counting down from a high value, but it
was applied indiscriminantly. It should at most be applied only to PWM 4.

This change also takes the opportunity to tidy up the pwm_init function.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Che-Liang Chiou
f24869d3a8 Exynos: Add timer_get_us function
timer_get_us returns the time in microseconds since a certain reference
point of history.  However, it does not guarantee to return an accurate
time after a long period; instead, it wraps around (that is, the
reference point is reset to some other point of history) after some
periods. The frequency of wrapping around is about an hour (or 2^32
microseconds).

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Simon Glass
3d00c0cb96 Exynos: Change get_timer() to work correctly
At present get_timer() does not return sane values. It should count up
smoothly in milliscond intervals.

We can change the PWM to count down at 1MHz, providing a resolution
of 1us and a range of about an hour between required get_timer() calls.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:08 +09:00
Akshay Saraswat
4f3bfa97c4 Exynos5: config: enable time command
This patch enables time command.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-04-01 14:02:07 +09:00
Akshay Saraswat
a4d40b856f Exynos5: clock: Fix a typo bug in exynos clock init
We intended to clear the bits of CLK_SRC_TOP2 register, instead we were
writing on the reserved bits of src_core1 register. Since the default
value of clk_src_top2 register were itself zero, this typo was not
creating any big issue. But it is better to fix this error for better
readability of the code.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 20:36:48 +09:00
Akshay Saraswat
2c6346c1be Exynos: config: Enable hash command
This enables hash command.

Tested with command "hash sha256 0x40008000 0x2B 0x40009000".
Used mm and md to write a standard string to memory location
0x40008000 and ran the above command to verify the output.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
1f9c92808a gen: Add sha h/w acceleration to hash
Adding H/W acceleration support to hash which can be used
to test SHA 256 hash algorithm.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
8e6ee2933c Exynos: config: Enable ACE HW for SHA 256 for Exynos
This enables SHA 256 for exynos.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
acbb1eb772 Exynos: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using ACE hardware.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-29 20:10:42 +09:00
Akshay Saraswat
db9e5e63be Exynos: clock: Fix a bug in PLL lock check condition
The condition for testing of PLL getting locked was incorrect. Rectify
this error in this patch.

Reported-by: Alexei Fedorov <alexie.fedorov@arm.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 15:15:11 +09:00
Przemyslaw Marczak
dc993a65f4 spl:falcon:trats: Fix SPL image size computing.
"spl_imgsize" was set as decimal variable by "setexpr"
and this causes wrong image size written by "ext4write".
Preset this val with "0x" prefix allow to fix this issue.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 11:42:35 +09:00
Vivek Gautam
7d17958408 spi: exynos: Fix compiler warnings for non-dt systems
Enclosing process_nodes() and spi_get_config() inside
CONFIG_OF_CONTROL, since they are compiled only for DT systems.

This fixes following warning:
exynos_spi.c:391:12: warning: 'process_nodes' defined but not used [-Wunused-function]

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 11:16:25 +09:00
Vivek Gautam
48e2218cd1 SMDK5250: Fix compiler warning for non-dt systems
Compiling for non-dt systems gives folowing warning:
smdk5250.c: In function 'board_eth_init':
smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable]

Declare variable 'node' only for dt enabled systems to remove this
warning.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-29 11:16:25 +09:00
Albert ARIBAUD
009d75ccc1 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	drivers/spi/tegra20_sflash.c
	include/fdtdec.h
	lib/fdtdec.c
2013-03-28 18:50:01 +01:00
Vincent Stehlé
d53e340edf armv7: do not relocate _start twice
The _start symbol is already relocated, so do not add the relocation the second
time in c_runtime_cpu_setup.

This fixes e.g. the abort exception handling path, which ended in double fault
due to bad address in VBAR.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
Reported-by: Lubomir Popov <lpopov@mm-sol.com>
2013-03-28 10:15:06 +01:00
R Sricharan
de63ac278c ARM: mmu: Set domain permissions to client access
The 'XN' execute never bit is set in the pagetables. This will
 prevent speculative prefetches to non executable regions. But the
 domain permissions are set as master in the DACR register.
 So the pagetable attribute for 'XN' is not effective. Change the
 permissions to client.

 This fixes lot of speculative prefetch aborts seen on OMAP5
 secure devices.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Tested-by: Vincent Stehle <v-stehle@ti.com>
Cc: Vincent Stehle <v-stehle@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-03-28 09:10:58 +01:00
R Sricharan
96fdbec2f9 ARM: mmu: Introduce weak dram_bank_setup function
Introduce a weak version of dram_bank_setup function
to allow a platform specific function.

This is used in the subsequent patch to setup dram region
without 'XN' attribute in order to enable the region
under client permissions.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Vincent Stehle <v-stehle@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-03-28 09:06:49 +01:00
Vincent Stehlé
dfa4138715 ARM: cache: declare set_section_dcache
We declare the set_section_dcache function globally in the cache header, for
later use by e.g. machine specific code.

Signed-off-by: Vincent Stehlé <v-stehle <at> ti.com>
Cc: Tom Rini <trini <at> ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-03-28 09:06:43 +01:00
Veli-Pekka Peltola
417c558031 apx4devkit: change maintainer
As I am no longer working for Bluegiga I will pass apx4devkit maintenance
to Lauri.

Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@iki.fi>
Acked-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
2013-03-27 15:30:11 -04:00
Steven Stallion
04d414090c image: Add support for Plan 9
Signed-off-by: Steven Stallion <sstallion@gmail.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-27 15:30:11 -04:00
Tom Rini
0171d52c41 cmd_ext4: BREAK and correct ext4write parameter order
The ext4write command was taking the in-memory address and filename path
in reverse order from the rest of the filesystem read and write
commands.  This corrects the order to be the same as fatload, etc.

Signed-off-by: Tom Rini <trini@ti.com>
2013-03-27 15:30:11 -04:00
Matt Porter
1d766c419e .checkpatch.conf: ignore udelay->usleep_range warnings
usleep_range() is a Linux facility, ignore it when udelay()
is encountered.

Signed-off-by: Matt Porter <mporter@ti.com>
2013-03-27 15:30:11 -04:00
Tom Rini
0cab42110d checkpatch.pl: Add 'debug' to the list of logFunctions
While the kernel mainly uses pr_debug(...), etc, for debug messages, we
use debug(...).  Add this to the list of logFunctions so that they are
correctly checked (and not warned against) for long string literals.

Signed-off-by: Tom Rini <trini@ti.com>
2013-03-27 15:30:11 -04:00
Tom Rini
268d966dff env_callback: Mark find_env_callback as static
This is not called outside of env_callback.c so mark static, remove from
<env_callback.h>

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2013-03-27 15:30:11 -04:00