Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This adds microcode blobs created from Intel FSP package for the
Chief River platform. They are for all the Ivy Bridge steppings:
306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the
306a9 which is already in the U-Boot tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
fsp_init() runtime buffer parameter might be different across
different platforms. Move this to update_fsp_configs().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
All FSP spec v1.0 complaint FSP binary uses struct fspinit_rtbuf
as defined by the 1.0 spec, however there are FSPs that does not
follow 1.0 spec (possible due to that FSP predates the 1.0 spec),
and future FSP binary that is complaint to v1.1 spec defines an
optional paltform-specific runtime data in the struct fspinit_rtbuf.
Hence move the definition to chipset header.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Those comments in update_fsp_configs() are not correct. Remove them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Not every FSP supports UPD, thus we introduce a Kconfig option
CONFIG_FSP_USE_UPD and use it to wrap these common UPD handling
codes in fsp_support.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
To support platform-specific configurations (might not always be
UPD on some platform), use a better name update_fsp_configs() and
accepct struct fsp_config_data as its parameter so that platform
codes can handle whatever configuration data for that FSP.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
FSP has several config data like UPD, HDA verb table which can be
overridden or provided by bootloader. Currently in U-Boot only UPD
is handled via struct shared_data. To accommodate any platform, we
rename shared_data to fsp_config_data and move the definition from
common place fsp_support.h to platform-specific place fsp_configs.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Save boot_mode in struct shared_data for future refactoring.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Declare stack_top as u32 in struct shared_data and struct common_buf
so that we can avoid casting in fsp_init().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
There is no need to pass shared_data to fsp_continue() so we can
remove unnecessary codes that simplifies the function a lot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
On these platforms we have many cases of boards that enable device model
and GPIO support but do not enable OF_CONTROL and pass in a device tree
with the binary. We need to bring in the platform data here as well.
Tested on Beaglebone Black.
Reported-by: Robert Nelson <robertcnelson@gmail.com>
Reported-by: Francisco Aguerre <franciscoaguerre@gmail.com>
Reported-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Add missing sandbox timer to test.dts, so that test-dm works.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
since:
commit: f05ad9ba "Add a way to skip relocation"
tqm5200s board fails to boot. Reason is that
board_init_f has a function parameter bootflag,
which is not setup in
in arch/powerpc/cpu/mpc5xxx/start.S _start
So board_init_f gets a undefined bootflag,
currently the gd pointer address. Unfortunately
this address sets the GD_FLG_SKIP_RELOC bit,
so u-boot code gets not relocated and u-boot
does not boot ...
Init bootflag with 0, and tqm5200 boots fine again.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
Check for bmode before reading the boot device
to check if a serial downloader is started,
and returns UART if the serial downloader is set,
letting SPL to wait for an image if
CONFIG_SPL_YMODEM_SUPPORT is set.
This allows to load again a SPL based board
with imx_usb_loader together with a tool
such as kermit.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Fabio Estevam <Fabio.Estevam@freescale.com>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Tested-by: Eric Nelson <eric@nelint.com>
For some board designs, it might be useful to switch the DC-DC
clock source to something else rather the default 24 MHz, e.g.
for EMI reasons.
For this, override the mxs_power_setup_dcdc_clocksource function
in your board support files.
Example:
void mxs_power_setup_dcdc_clocksource(void)
{
mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ);
}
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Make sure the NAND reset is not asserted in full U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
If the system boots from NAND, make sure to de-assert the NAND IP
reset, otherwise the system will get stuck.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Define the NAND reset bit and fix the ordering of the macros.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
When we want to boot Linux with a DTB file downloaded from a TFTP
server or somewhere, we need to know the file name to be downloaded.
Assume the U-Boot configuration is shared among some similar boards.
If they are similar enough, the difference only appears in device
trees. The build procedure would be like this:
- Board A: make foo_common_defconfig && make DEVICE_TREE=foo_board_a
- Board B: make foo_common_defconfig && make DEVICE_TREE=foo_board_b
- Board C: make foo_common_defconfig && make DEVICE_TREE=foo_board_c
In this case, the U-Boot image contains nothing about the DTB file name
it is running with. (CONFIG_DEFAULT_DEVICE_TREE is not helpful for this
purpose because it is painful to change it from "make menuconfig" for
each board.)
This commit allows to lookup the DTB file name based on the compatible
string and set it to "fdt_file" environment. Then "tftpboot $fdt_file"
will download the file we want.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The UMC (Universal Memory Controller) and the DDR PHY block are
highly related to each other. It is better to have both code in the
same directory.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Both "Model 1" and "Model 2" are supported for ProXstream2 and
PH1-LD6b boards. It is useful to show the model number in the
boot banner.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Compile this file for U-Boot proper as well as SPL, so that the
U-Boot proper can call uniphier_get_board_param().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The DDR3 memory chips on ProXstream2 boards support up to 2133 MHz,
while only up to 1866MHz on PH1-LD6b boards.
Split the board data structure and change the DDR frequency of
ProXstream2 boards to 2133 MHz.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Move "gd->fdt_blob" from the caller to the callee so that this
function can be used more easily.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
We sometimes have to implement different code depending on the SoC
revision. This commit adds functions to get the model/revision
number.
Note:
Model number: incremented on major changes of the SoC
Revision number: incremented on minor changes of the SoC
The "Model 2" exists for PH1-sLD3, ProXstream2/PH1-LD6b.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
These nodes are not parsed by U-Boot for now, but syncing device trees
with Linux is helpful for easier diffing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi. This improves the code
maintainability.
PH1-sLD3 is so old that it has more or less different register maps
than the others. So, it cannot be included in this refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Return different error code depending on the reason so that the
caller can know the cause of the failure.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The bit 27-24 of the DTCR register is described as RANKEN in the
DDR PHY databook. Follow this abbreviation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This node must be available before relocation, otherwise the board
will not find mmc and will thus not boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
The L2 cache was never enabled in the v7_outer_cache_enable(), fix
this and enable the L2 cache.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
This commit adds support of USB 1.1 storage media on AXS103 board.
For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing
messages like this:
------------------------>8-------------------
AXS# usb start
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80
unable to get device descriptor (error=-1)
1 USB Device(s) found
------------------------>8-------------------
As a work-around we're falling back to USB 1.1.
Indeed it is much slower but at least USB storage devices are usable on
AXS103.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
We need to select DM_KEYBOARD now that the usb-kbd code has been converted
to this, otherwise usb keyboards do not work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The Empire Electronix D709 tablet is a fairly standard 7" A13 tablet,
featuring usb-wifi, a micro-sd slot, micro-usb otg and headphone jack.
Empire Electronix is written on the back of the tablet, the D709 model
info can be found in the about tablet menu in android.
The PCB has no markings to speak of.
This dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Move the macro into the socfpga_dwmci_clksel().
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Marek Vasut <marex@denx.de>
[fix parenthesis in the sdmmc_mask]
The scan manager is not needed for the Arria10. Edit the makefile to
build the scan manager for arria5 and cyclone5 only.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
