Commit Graph

13700 Commits

Author SHA1 Message Date
Tom Rini
f739fcd831 SPDX: Convert a few files that were missed before
As part of the main conversion a few files were missed.  These files had
additional whitespace after the '*' and before the SPDX tag and my
previous regex was too strict.  This time I did a grep for all SPDX tags
and then filtered out anything that matched the correct styles.

Fixes: 83d290c56f ("SPDX: Convert all of our single license tags to Linux Kernel style")
Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-10 20:38:35 -04:00
Hannes Schmelzer
7f1cb1d588 bootm: fix 'memory-fixup' for vxWorks boot
The check for having a memory node within the fdt blob is made wrong, we
fix this here.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-10 20:38:34 -04:00
Tom Rini
e8f80a5a58 Merge git://git.denx.de/u-boot-sunxi 2018-05-09 12:58:06 -04:00
Grygorii Strashko
218ac107c5 arm: bitops: fix find_next_zero_bit() for case size < 32
find_next_zero_bit() incorrectly handles cases when:
- total bitmap size < 32
- rest of bits to process

static inline int find_next_zero_bit(void *addr, int size, int offset)
{
	unsigned long *p = ((unsigned long *)addr) + (offset >> 5);
	unsigned long result = offset & ~31UL;
	unsigned long tmp;

	if (offset >= size)
		return size;
	size -= result;
	offset &= 31UL;
	if (offset) {
		tmp = *(p++);
		tmp |= ~0UL >> (32-offset);
		if (size < 32)
[1]
			goto found_first;
		if (~tmp)
			goto found_middle;
		size -= 32;
		result += 32;
	}
	while (size & ~31UL) {
		tmp = *(p++);
		if (~tmp)
			goto found_middle;
		result += 32;
		size -= 32;
	}
[2]
	if (!size)
		return result;
	tmp = *p;

found_first:
[3]  tmp |= ~0UL >> size;

^^^ algo can reach above line from from points:
 [1] offset > 0 and size < 32, tmp[offset-1..0] bits set to 1
 [2] size < 32 - rest of bits to process
 in both cases bits to search are tmp[size-1..0], but line [3] will simply
 set all tmp[31-size..0] bits to 1 and ffz(tmp) below will fail.

example: bitmap size = 16, offset = 0, bitmap is empty.
 code will go through the point [2], tmp = 0x0
 after line [3] => tmp = 0xFFFF and ffz(tmp) will return 16.

found_middle:
	return result + ffz(tmp);
}

Fix it by correctly seting tmp[31..size] bits to 1 in the above case [3].

Fixes: 81e9fe5a29 ("arm: implement find_next_zero_bit function")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-05-08 18:50:23 -04:00
Ramon Fried
707e6ef964 db410c: set clk node to be probed before relocation
The clock node is used by the serial driver and it's needed
before relocation.
This patch ensures that the msm-serial driver can actually
use the clock node.

Signed-off-by: Ramon Fried <ramon.fried@linaro.org>
2018-05-08 18:50:22 -04:00
Patrice Chotard
da33b0a1ca ARM: dts: sti: Add stih410-b2260-u-boot.dtsi
STiH410 has 2 PHYs wired on the DWC3 IP, USB2 and USB3 PHYs.
As currently no U-boot driver is available for the USB3 PHY and to avoid
issue during DWC3 drive probe, we use DWC3 IP with only USB2 PHY
using stih410-b2260-u-boot.dtsi file.

Fixes: 2fd4242cc5 ("ubs: xhci-dwc3: Enable USB3 PHY when available")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 18:50:22 -04:00
Patrice Chotard
dbe2fcb87d ARM: dts: stm32mp157: Add vrefbuf DT node
Add vrefbuf device tree node. This allows to get
a voltage reference for ADCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:40 -04:00
Patrice Chotard
21299d3a68 ARM: dts: stm32mp157c-ed1: Add regulator node
Add regulator nodes needed by stpmu1 regulator driver
Add vmmc-supply and vqmmc-supply regulator property for
sdmmc1 and sdmmc2.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:39 -04:00
Patrice Chotard
7c339bbae6 ARM: dts: stm32mp157: Add SoC pwr regulator entry
Add SoC power regulator entry for reg11, reg18 and usb33
regulator.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Patrick Delaunay
e8b85e810a stm32mp: regulator: add SoC pwr regulator support
This driver binds and manages the following regulator of
SoC's PWR block :
  - reg11
  - reg18
  - usb33

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08 09:07:38 -04:00
Mario Six
cb61c9ec64 arm: controlcenterdc: Add spi-flash compatible strings
Since kirkwook SPI was recently converted to DM, add compatible strings
to the SPI flash devices to make them work with the new driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 09:07:37 -04:00
Praneeth Bajjuri
cd30f3fc9e arm: dra76: fastboot: extend cpu type for getvar command
'commit dda0bd674481 ("arm: dra762: Add support for device package identification")'
introduces ABZ and ACD package identification.

This patch is to extend usage of "fastboot getvar cpu" for
DRA76x ABZ and ACD devices.

Helps in fixing the boot warning.

Warning: fastboot.cpu: unknown CPU rev: 123863298
on
CPU  : DRA762-GP ES1.0 ABZ package
Model: TI AM5748 IDK
Board: AM574x IDK REV 1.0A

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-08 09:07:37 -04:00
Ludovic Desroches
8ee54672df gpio: atmel_pio4: give a full configuration when muxing pins
When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:36 -04:00
Ludovic Desroches
cbccb33584 gpio: atmel_pio4: add drive strength macros
Macros for drive strength configuration were missing.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:35 -04:00
Neil Armstrong
7d750c3520 ARM64: meson: Sync DT and Bindings with Linux 4.16
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Neil Armstrong
f0f3762cb7 ARM: meson: rename GXBB to GX
Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Patrick Bruenn
274fb461f4 dm: led: add testcase for "default-state" property
Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.

dm: led: add testcase for "default-state" property

Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Lokesh Vutla
a43d46a73c arm: v7R: Add support for enabling caches
Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:53:29 -04:00
Lokesh Vutla
f2ef204312 arm: v7R: Add support for MPU
The Memory Protection Unit(MPU) allows to partition memory into regions
and set individual protection attributes for each region. In absence
of MPU a default map[1] will take effect. Add support for configuring
MPU on Cortex-R, by reusing the existing support for Cortex-M processor.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html

Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:53:29 -04:00
Michal Simek
4bbd6b1d94 arm: v7R: Add initial support
The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
real-time systems. It implements the ARMv7-R architecture, and includes
Thumb-2 technology for optimum code density and processing throughput.

Except for MPU(Memory Protection Unit) and few CP15 registers, most of the
features are compatible with v7 architecture. So,reuse the same armv7
folder and introduce a new config CPU_V7R in order to differentiate
from v7 based platforms.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
f4bcd767bd arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15
Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
7240b80ee0 arm: v7: Kconfig: Add entry for MMU
Add a Kconfig entry for MMU and imply for all platforms using
cache-cp15.c containing MMU setup. Using imply instead of select so that
MMU can be disabled by defconfigs when not needed.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
acf1500138 arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.

As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.

Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:24 -04:00
Lokesh Vutla
2a5180535c arm: v7: Update VBAR only if available
Not all ARM V7 based cpus has VBAR for remapping
vector base address. So, update VBAR only if it available.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
99552c3435 test: regmap: test Linux-compatible syscon_node_to_regmap()
Like Linux, syscon_node_to_regmap() allows a node to work as a syscon
provider without binding it to a syscon driver.  Test this.

Requested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
d35812368a regmap: change regmap_init_mem() to take ofnode instead udevice
Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.

Change the first argumenet to take a device node.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
8c1de5e08b regmap: clean up regmap allocation
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members.  There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".

As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.

Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:15:27 -04:00
Patrick Delaunay
9ce751a6f5 psci: arm: remove armv7 function psci_save_target_pc
This function is no more used, and replaced by psci_save
which save also context id as requested by PSCI requirements.

Even if the context id is not used by Linux, it should be saved
and restored in r0 when the CPU_ON is performed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
9622c7e65d sunxi: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
4f7dc2e603 uniphier: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
4c6fe075ce tegra: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
47ec6b4ea3 imx7: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
60599c1c08 ls102xa: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:54 -04:00
Patrick Delaunay
41c79775f0 arm: stm32mp1: add PSCI support
Add PSCI v1.0 support for Linux and manage PSCI state
for each CPU (affinity 0 level) with all mandatory functions:
- PSCI_VERSION
- CPU_SUSPEND
- CPU_OFF
- CPU_ON
- AFFINITY_INFO
- SYSTEM_OFF
- SYSTEM_RESET
- PSCI_FEATURES
and 1 optional to avoid Linux warning
- MIGRATE_INFO_TYPE

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
2018-05-07 11:52:48 -04:00
Patrick Delaunay
486daaa618 arm: psci: add a weak function psci_arch_cpu_entry
The added function psci_arch_cpu_entry() is called
during psci_cpu_entry() and can be used by arch to handle
PSCI state transition from ON_PENDING to ON.

The default weak function is empty: not behavior change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:45:15 -04:00
Patrick Delaunay
1a047c23f9 arm: psci: save context id for cpu_on PSCI command
Save and use the 3rd parameter of PSCI CPU_ON request: context_id.

The context_id parameter is only meaningful to the caller.
U-Boot PSCI preserves a copy of the value passed in this parameter.
Following wakeup from a  powerdown state, U-BOOT PSCI places
this value in R0 when it first enters the OS.

NB: this context id is not (yet?) used by Linux but it is mandatory
    to be PSCI compliant.

update armv7 psci functions:
- psci_save_target_pc(): keep for backward compatibility with
  current platform (only save PC and force context id to 0)
  => should be removed when all platform migrate to the new API

- psci_save(): new API to use by ARMv7 platform with PSCI,
  save pc (= entry_point_address) and context_id

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 11:45:15 -04:00
Tom Rini
4549e789c1 SPDX: Convert all of our multiple license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document.  Note that parenthesis are
allowed so when they were used before we continue to use them.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 10:24:31 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Jagan Teki
f3df7758b5 board: sunxi: sun8i-v40: Add Bananapi M2 Berry support
Banana Pi BPI-M2 Berry is a quad-core mini single board computer
built with Allwinner V40 SoC. It features
- Quad Core ARM Cortex A7 CPU V40
- 1GB of RAM .
- microSD/SATA port..
- onboard WiFi and BT
- 4 USB A 2.0 ports
- 1 USB OTG port
- 1 HDMI port
- 1 audio jack
- DC power port

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-07 11:33:19 +05:30
Jagan Teki
842cc8e094 ARM: dts: sun8i: Sync r40 dtsi from Linux
Sync sun8i-r40.dtsi changes from Linux with

Merge: a406778618d0 088345fc3553
Author: Stephen Rothwell <sfr@canb.auug.org.au>
Date:   Tue Apr 24 14:15:02 2018 +1000

    Merge branch 'akpm/master'

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-05-07 11:31:43 +05:30
Lokesh Vutla
7ce85318cf arm: mach-omap2: cache: Explicitly enable I cache
omap-common cache enabling sequence relies on cpu_init_cp15()
(inside start.S) for enabling I-caches. But cpu_init_cp15()
can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
enable I-caches if not enabled already.

Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-06 13:35:40 -04:00
Marek Vasut
699e831e15 ARM: rmobile: Contain CONFIG_ARCH_RMOBILE_BOARD_STRING
Pull the symbol from the boards and zap struct rmobile_sysinfo as they
are rather useless. The entire purpose of that whole machinery was to
print board name in the CONFIG_ARCH_RMOBILE_BOARD_STRING. Do that in a
far simpler and more contained manner.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:51:56 +02:00
Marek Vasut
83a64bebe4 ARM: rmobile: Convert CONFIG_ARCH_RMOBILE_BOARD_STRING to Kconfig
Convert the symbol to Kconfig, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:51:53 +02:00
Chen-Yu Tsai
9b9ceba03d sunxi: Sort dts Makefile entries for H3
The dts Makefile entries for the H3 are not ordered correctly.
Move the Nano Pi entries before the Orange Pi so they are.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:59 +05:30
Chen-Yu Tsai
e9392b373a sunxi: Add Libre Computer Board ALL-H3-CC H5 ver.
This patch adds a device tree file for the H5 version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe2754412 ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and
has 4Gb DDR3 chips instead of 2Gb ones.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Chen-Yu Tsai
ad34951708 sunxi: Add Libre Computer Board ALL-H3-CC H2+ ver.
This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe2754412 ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and
has only two 2Gb DDR3 chips instead of four.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Chen-Yu Tsai
d7b17f1c24 sunxi: Split out common board design for ALL-H3-CC device tree
The Libre Computer Project ALL-H3-CC has three models, all using the
same board design, but with different pin compatible SoCs and amount of
DRAM.

Currently only the H3 1GB DRAM variant is supported. To support the two
other variants, first split the original device tree into a common board
design part and an SoC specific part.

The SoC part only defines which SoC is used and model name, and includes
the SoC specific dtsi file and the common design dtsi file.

Also fix up the SPDX identifier line to use the correct comment style,
and place it on the first line.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Tom Rini
b25f8e2112 Merge git://git.denx.de/u-boot-imx 2018-04-30 07:14:05 -04:00
Alex Kiernan
117a0e02be spl: ti: Avoid preloader_console_init if !CONFIG_SPL_SERIAL_SUPPORT
If CONFIG_SPL_SERIAL_SUPPORT is disabled then the build fails because
serial_init is undefined. Guard preloader_console_init() appropriately
to fix this.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:22 -04:00
Andre Przywara
7842b6a91e arm: move SYS_ARCH_TIMER to KConfig
SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch
timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards.
Add a proper Kconfig symbol to express this dependency properly,
allowing certain board configuration to later disable arch timer in case
there are any problems with it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[tuomas: rebase + fix conflicts and resync with moveconfig & use select]
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-04-28 18:30:43 -04:00