mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-03 18:10:42 +09:00
d7b17f1c24
The Libre Computer Project ALL-H3-CC has three models, all using the same board design, but with different pin compatible SoCs and amount of DRAM. Currently only the H3 1GB DRAM variant is supported. To support the two other variants, first split the original device tree into a common board design part and an SoC specific part. The SoC part only defines which SoC is used and model name, and includes the SoC specific dtsi file and the common design dtsi file. Also fix up the SPDX identifier line to use the correct comment style, and place it on the first line. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
||
|---|---|---|
| .. | ||
| arc | ||
| arm | ||
| m68k | ||
| microblaze | ||
| mips | ||
| nds32 | ||
| nios2 | ||
| powerpc | ||
| riscv | ||
| sandbox | ||
| sh | ||
| x86 | ||
| xtensa | ||
| .gitignore | ||
| Kconfig | ||