Add support for internal matrix keyboard controller for Nvidia Tegra
platforms. This driver uses the fdt decode function to obtain its key
codes.
Support for the Ctrl modifier is provided. The left and right ctrl keys are
dealt with in the same way.
This uses the new keyboard input library (drivers/input/input.c) to decode
keys and handle most of the common input logic. The new key matrix library
is also used to decode (row, column) key positions into key codes.
The intent is to make this driver purely about dealing with the hardware.
Key detection before the driver is loaded is supported. This key will be
picked up when the keyboard driver is initialized.
Modified by Bernie Thompson <bhthompson@chromium.org> and
Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix
and various other things.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Matrix keyboards require a key map to be set up, and must also deal with
key ghosting.
Create a keyboard matrix management implementation which can be leveraged
by various keyboard drivers. This includes code to read the keymap from
the FDT and perform debouncing.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add a module which understands converting key codes (or scan codes)
to ASCII characters. It includes FIFO support and can call back to
drivers to read new characters when its FIFO is empty.
Keycode maps are provided for un-modified, shift and ctrl keys.
The plan is to use this module where such mapping is required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
We want to able to decode Linux fdt keymaps, so bring part of this
enormous header file over to U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Sometimes we don't need a full cell for each value. This provides
a simple function to read a byte array, both with and without
copying it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add support for setting up the memory controller parameters. Boards
can set up an appropriate table in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add support for AES using an implementation from Karl Malbrain.
This offers small code size (around 5KB on ARM) and supports 128-bit
AES only.
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This power management chip supports battery charging and a large number
of power supplies. This initial driver only provides the ability to adjust
the two synchronous buck converters SM0 and SM1 in a stepwise manner.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This macro is generally useful to make it available in common.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
We need to iterate through subnodes of a parent, looking only at
compatible nodes. Add a utility function to do this for us.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
fdtdec_locate_array() locates an integer array but does not copy it. This
saves the caller having to allocated wasted space.
Access to array elements should be through the fdt32_to_cpu() macro.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add "update_sd_firmware" command to easily reload the SD card of
m28evk kit. This comes handy when the board boots from SD card.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.
The kernel uses this data to distinguish between Dialog versus mc34708 based boards,
and also to distinguish between revA and revB of the mc34708 based boards.
Suggested-by: Yu Li <yk@magniel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
On the mx53loco board with mc34708 PMIC it is necessary to turn on VUSB regulator
so that the mx53 USBH1 PHY receives the 3.3V voltage.
Tested by inserting a USB pen drive in the upper USB slot (USBH1) and then issued the
commands:
usb start
usb info
,which correctly detected and printed the USB pen drive information.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Add mc34708 support and set mx53 core frequency at its maximum value of 1GHz.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC,
we need to be able to build both drivers.
Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
NAND support is not enabled by default because Eval Kit is not delivered
with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config.
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Acked-by: Marek Vasut <marex@denx.de>
This will eventually be needed with Linux 3.5, which will be the point when
MXS will be switched to FDT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
There are two types of mx53loco boards: initial boards were built with a Dialog
DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC.
Add DA9053 PMIC support and adjust the required voltages and clocks for running
the CPU at 1GHz.
Tested on both versions of mx53loco boards.
In the case of a MC34708-based board the CPU operating voltage remains at 800MHz.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by : Stefano Babic <sbabic@denx.de>
Print CPU information within board_late_init().
This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Uses the 'magic_keys' idiom as described in doc/README.kbd:
http://lists.denx.de/pipermail/u-boot/2012-April/122502.html
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Allow booting a zImage kernel.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
The ESG ima3-mx53 board is based on the Freescale
i.MX53 SOC. It boots from NOR (128 MB) and
supports Ethernet (FEC), SATA.
Signed-off-by: Stefano Babic <sbabic@denx.de>
This driver is part of Freescale's LTIB for
MX5 / MX6.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Terry Lv <r65388@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
This patch support TRATS board configuration and display function.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit adds support for MAX8997 PMIC driver.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Trats is supported 1GiB memory size.
(Each bank size is 512MB.)
And INITRD is unnecessary. So removed them.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch enables LDO4 power line for preparing proper voltages to be
measured by ADC converter.
This measurement is used for determination of target board HW revision.
Test HW:
Universal_C210 (Exynos4210) rev. 0.0
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
With almost all the architecture and board BOARD_LATE_INIT does not use.
CONFIG_BOARD_LATE_INIT is used instead.
This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
With almost all the architecture and board BOARD_LATE_INIT does not use.
CONFIG_BOARD_LATE_INIT is used instead.
This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Enable I2C multi-bus support and config I2C muxes for I2C2 and I2C3.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
As ttyS0 is no longer valid for newer OMAP kernels, and pandora serial
cables are not widespread, simply drop console argument. This should
allow booting old and new kernels with default arguments, and those who
need serial can use a boot script on SD card.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
This will add ARM specific over-rides for the defines
from linux/linkage.h
Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
This is rework on config files of IGEP-based boards with the aim to remove
duplicated code to be more maintainable. Basically this patch creates a
common configuration file for both boards and only sets the specific option
in the board config file.
On board files the hardcored mach type was replaced in favour of using the
CONFIG_MACH_TYPE option.
More than 200 duplicated lines have been deleted.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
This change adds a basic support for Embest/Timll DevKit3250 board,
NOR and UART are the only supported peripherals for a moment. The board
doesn't require low-level init, because the initial SDRAM and GPIO
configuration is performed during kickstart bootloader execution.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
To support sdhci controller, remove the CONFIG_S5P_MMC..
Instead, use the CONFIG_S5P_SDHCI/CONFIG_SDHCI.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
To support the Samsung-SoC, added the basically functions.
Samsung-SoC didn't used the SDHCI_CTRL_HISPD.
And added set_control_reg callback for s3c64xx.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
When response type is R1b, mask value is added the SDHCI_INT_DAT_END.
but in while(), didn't check that flag.
So sdhci controller didn't work fine.
CMD6 didn't always complete.
So add the quirks for broken r1b response
and add the timeout value to prevent the infinite loop.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
This patch imports parts of two patches from the Freescale U-Boot with the following
commit messages:
ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=e436525a70fe47623d346bc7d9f08f12ff8ad787
The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card
when auto-clock gating is enabled for commands with busy signalling and no data
phase. The card might require the clock to exit the busy state, so the workaround
is to disable the auto-clock gate bits in SYSCTL register for such commands. The
workaround also entails polling on DAT0 bit in the PRSSTAT register to learn when
busy state is complete. Auto-clock gating is re-enabled at the end of busy state.
ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=a77c6fec8596891be96b2cdbc742c9824844b92a
Removed delay of 10 ms before each command. There should not be a need to have this
delay after the ENGR00156405 patch that polls until card is not busy anymore before
proceeding to next cmd.
This patch imports the polling part of both patches. The auto-clock gating code
don't apply for i.MX6 as implemented in these two patches.
SYSCTL_RSTA was defined twice. Remove one definition.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
The outdated struct mmc_csd was only used by old atmel_mci driver which was
removed in c9abb4260c.
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
cc: Andy Fleming <afleming@freescale.com>
This patch sets the MMC width according to the MMC host capabilities.
It turned out, that there are some targets (e.g. GONI), which are able
to read data from SPI only at 4 bit mode.
This patch restricts the width number according to the MMC host.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
lin_gadget: use common linux/compat.h
linux/compat.h: rename from linux/mtd/compat.h
lin_gadget: use common mdelay
gunzip: rename z{alloc, free} to gz{alloc, free}
fs/fat: align disk buffers on cache line to enable DMA and cache
part_dos: align disk buffers on cache line to enable DMA and cache
Merge our duplicate definitions with the common header.
Also fix drivers/usb/gadget/s3c_udc_otg_xfer_dma.c to
use min() instead of min_t() since we remove the latter
from compat.h.
Additionally use memalign() directly as the lin_gadget
specific kmalloc() macro is removed from lin_gadget_compat.h
by this patch.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
This allows us to add a proper zalloc() func (one that does a zeroing
alloc), and removes duplicate prototypes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* 'master' of /home/wd/git/u-boot/custodians:
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
PowerPC: correct the SATA for p1/p2 rdb-pc platform
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
powerpc/corenet_ds: Slave module for boot from SRIO
powerpc/corenet_ds: Master module for boot from SRIO
powerpc/corenet_ds: Document for the boot from SRIO
powerpc/corenet_ds: Correct the compilation errors about ENV
powerpc/srio: Rewrite the struct ccsr_rio
powerpc/85xx:Fix lds for nand boot debug info
powerpc/p2041rdb: add env in NAND support
powerpc/p2041rdb: add NAND and NAND boot support
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
powerpc/85xx:Avoid vector table compilation for nand_spl
powerpc/85xx:Fix IVORs addr after vector table relocation
powerpc/85xx:Avoid hardcoded vector address for IVORs
powerpc/p1023rds: Disable nor flash node and enable nand flash node
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
PowerPC: correct the SATA for p1/p2 rdb-pc platform
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
powerpc/corenet_ds: Slave module for boot from SRIO
powerpc/corenet_ds: Master module for boot from SRIO
powerpc/corenet_ds: Document for the boot from SRIO
powerpc/corenet_ds: Correct the compilation errors about ENV
powerpc/srio: Rewrite the struct ccsr_rio
powerpc/85xx:Fix lds for nand boot debug info
powerpc/p2041rdb: add env in NAND support
powerpc/p2041rdb: add NAND and NAND boot support
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
powerpc/85xx:Avoid vector table compilation for nand_spl
powerpc/85xx:Fix IVORs addr after vector table relocation
powerpc/85xx:Avoid hardcoded vector address for IVORs
powerpc/p1023rds: Disable nor flash node and enable nand flash node
* 'master' of /home/wd/git/u-boot/custodians:
i2c:designware Turn off the ctrl when setting the speed
i2c: Add support for designware i2c controller
sh: i2c: Add support I2C controller of SH7734
* 'master' of git://git.denx.de/u-boot-i2c:
i2c:designware Turn off the ctrl when setting the speed
i2c: Add support for designware i2c controller
sh: i2c: Add support I2C controller of SH7734
* 'master' of git://git.denx.de/u-boot-nds32:
board/adp-ag102: add configuration of adp-ag102
board/adp-ag102: add board specific files
nds32/ag102: add ag102 soc support
nds32/ag102: add header support of ag102 soc
In hardware revision 1.20 one more fan controller is added to dlvision-10g.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Print fpga info at last_stage_init on gdsys 405ep boards.
Use dtt_init() to startup fans.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
In order to add boards that have different hardware for fpga reset,
any 405ep gdsys board now provides these functions:
void gd405ep_init(void);
void gd405ep_set_fpga_reset(unsigned state);
void gd405ep_setup_hw(void);
int gd405ep_get_fpga_done(unsigned fpga);
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Environment size on neo has to be 0x20000 for compatibilty reasons.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
md5.c: In function ‘MD5Final’:
md5.c:156:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
md5.c:157:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
* 'marex@denx.de' of git://git.denx.de/u-boot-staging:
CMD: CONFIG_CMD_SETECPR -> CONFIG_CMD_SETEXPR on omap3_logic
CMD: Fix CONFIG_CMD_SAVEBP_WRITE_SIZE -> CONFIG_CMD_SPL_WRITE_SIZE
CMD: Fix typo CMD_FSL -> CMD_MFSL in readme
HWW1U1A: Fix CMD_SHA1 -> CMD_SHA1SUM
CMD: Remove CMD_LOG, it's unused
CMD: Fix typo KGBD -> KGDB on debris board
CMD: Drop CONFIG_CMD_EMMC, it's not used
CMD: Drop CONFIG_CMD_DFL, it's not used
CMD: Drop CMD_DCR, it's not used
CMD: Drop CMD_CAN, it's not used
CMD: Remove CMD_AUTOSCRIPT, it's not used
AT91: Drop AT91_SPIMUX command from cmd_all
For p1/p2 rdb-pc platform, use the PCIe-SATA Silicon Image SATA controller.
Therefore, the SATA driver will use sata_sil, instead sata_sil3114.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Andy Fleming <afleming@gmail.com>
When boot from SRIO, slave's core can be in holdoff after powered on for
some specific requirements. Master can release the slave's core at the
right time by SRIO interface.
Master needs to:
1. Set outbound SRIO windows in order to configure slave's registers
for the core's releasing.
2. Check the SRIO port status when release slave core, if no errors,
will implement the process of the slave core's releasing.
Slave needs to:
1. Set all the cores in holdoff by RCW.
2. Be powered on before master's boot.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
When boot from SRIO, slave's ENV can be stored in master's memory space,
then slave can fetch the ENV through SRIO interface.
NOTE: Because the slave can not erase, write master's NOR flash by SRIO
interface, so it can not modify the ENV parameters stored in
master's NOR flash using "saveenv" or other commands.
Master needs to:
1. Put the slave's ENV into it's own memory space.
2. Set an inbound SRIO window covered slave's ENV stored in master's
memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode and ENV from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode and ENV.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
When boot from SRIO, slave's ucode can be stored in master's memory space,
then slave can fetch the ucode image through SRIO interface. For the
corenet platform, ucode is for Fman.
Master needs to:
1. Put the slave's ucode image into it's own memory space.
2. Set an inbound SRIO window covered slave's ucode stored in master's
memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.
The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
locally.
For the slave module, need to finish these processes:
1. Set the boot location to SRIO1 or SRIO2 by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
4. Slave's u-boot image should be generated specifically by
make xxxx_SRIOBOOT_SLAVE_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.
The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
For the master module, need to finish these processes:
1. Initialize the SRIO port and address space.
2. Set inbound SRIO windows covered slave's u-boot image stored in
master's NOR flash.
3. Master's u-boot image should be generated specifically by
make xxxx_SRIOBOOT_MASTER_config
4. Master must boot first, and then slave can be powered on.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
When defined CONFIG_ENV_IS_NOWHERE, there will be some
compilation errors:
./common/env_nowhere.o: In function `env_relocate_spec':
./common/env_nowhere.c:38: multiple definition of `env_relocate_spec'
./common/env_flash.o: ./common/env_flash.c:326: first defined here
./common/env_nowhere.o: In function `env_get_char_spec':
./common/env_nowhere.c:42: multiple definition of `env_get_char_spec'
./common/env_flash.o:./common/env_flash.c:78: first defined here
./common/env_nowhere.o: In function `env_init':
./common/env_nowhere.c:51: multiple definition of `env_init'
./common/env_flash.o:./common/env_flash.c:237: first defined here
make[1]: *** [./common/libcommon.o] Error 1
make[1]: Leaving directory `./common'
make: *** [./common/libcommon.o] Error 2
Remove the CONFIG_ENV_IS_IN_FLASH if defined CONFIG_ENV_IS_NOWHERE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Add env in NAND support when boot from NAND.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
New P2041RDB board will add a NAND chip, so add support for NAND and
NAND boot.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>