The clock source for master clock can be slow clock, main clock,
plla clock or upll clock. So, make the clock source selection
field in mckr can be configured.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
We need to make sure the main clock ready field in MCFR is set
after switch to main crystal oscillator.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
When boot up without mac address setting, it will give the warning
message like: "Warning: failed to set MAC address", however when
execute network related command, it still execute them without any
warning information.
With this patch, it will exit directly with following information:
"gmac0: mac address is not valid"
It also solve the problem after bootup then set mac address and the
mac address won't set to net device issue.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This change adds support for enabling the USB host features of the board.
This includes the USB3503A hub and the SMC LAN9730 ethernet controller
as well.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Enable/disable the usb host phy on the odroid U/X2 boards which are based
on the Exynos4412 SOC.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Allow to set the buck voltage for the max77686.
This will be used to reset the SMC LAN9730 ethernet on the odroids.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Compile-time tested only, as I currently don't have access to
the eval board.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The current vbus GPIOs on snow make very little sense, their number is
far above the maximum. As a result, USB doesn't work on snow.
Correct the GPIO numbering so they match the current scheme for exynos5.
Tested both EHCI and XHCI to correctly work after this change.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
I was running into this limit with a not overly long PXE append line.
Since the PXE code wants to print the resulting command line increase
CONFIG_SYS_PBSIZE too.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This replaces the existing CONFIG_BOOTCOMMAND for exynos5250 and 5420.
exynos4 platforms seem to have existing complex extra env configuration for
booting and so are excluded here. Hence the bootcmd.h is added to
exynos5-common.h.
I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
...and remove explicit setting of things which this implies. This is done for
all exynos platforms (4 & 5) so it is added to exynos-common.h
I'm mainly interested in CONFIG_CMD_BOOTZ and CONFIG_SUPPORT_RAW_INITRD
I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Exynos5800 IROM has a different, from 5250 and 5420, prototype of the
usb_copy() function. Luckily the earlier version did not expect any
arguments, which means the same code could be used with old and new
SoCs, the old ones just ignoring the arguments.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add a 4G configuration and choose it based on the number of banks
declared in config file. A board with 4 SDRAM banks declared (as
per CONFIG_NR_DRAM_BANKS) will end up with the 2G confiuration.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Since, not every board may have all memory channels configured
and all available banks of DMC used, we wish to refactor configs
for Memory Bank size and numbers as per board memory config.
For Example, Peach-Pit has 2GB memory and will be using only 4 banks
but Peach-Pi has 3.5GB memory and will be using all 7 available
SDRAM banks.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
As per Exynos5800 UM ver 0.00 section 17.13.2.1
CONCONTROL register bit 3 [update_mode], Exynos5800 does not
support the PHY initiated update. And it is recommanded to
set this field to 1'b1 during initialization. This patch sets this bit.
Applying MC-initiated mode makes DDL tracking ON, that helps in
compensate MIF voltage variation.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This adds following things :
- New config and defconfig for Peach-Pi board.
- Alterations in Kconfig and MAINTAINERS.
- Addition of CONFIG_EXYNOS5800.
- ADdition of exynos5800-peach-pi in dts list.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
We have a new board Peach-Pi similar to Peach-Pit. Peach-Pi
differs from Peach-Pit in configuration factors like display
resolution, memory size, SoC version etc.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch intends to add a new proid for Exynos5800 which is a
variant of Exynos5420. Product id for Exynos5800 is 0x5422.
Both Exynos5420 and Exynos5800 are pin to pin compitable. This
gives us an advantage of reusing Exynos5420 clock, pinmux, memory
and other settings.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Common part of config for lager, koelsch, alt and gose board will be able to
replace rcar-gen2-common.h.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The lager, koelsch, alt, gose board supported in rmobile is
distinguished as the R-Car Gen2 series and has much common setting.
This collect up the common part of config as rcar-gen2-common.h.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Gose board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Lager board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Koesch board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Alt board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of
dram_init_banksize instead.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This change helps to run script on machines with quite long uptime.
Without this the following error emerges:
File: ./dat_14M.img
umount: /mnt/tmp-ums-test: device is busy.
(In some cases useful info about processes that use
the device is found by lsof(8) or fuser(1))
TX: md5sum:083d3d22b542d3ecba61b12d17e03f9f
mount: /dev/sdd6 already mounted or /mnt/tmp-ums-test busy
mount: according to mtab, /dev/sdd6 is already mounted on /mnt/tmp-ums-test
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Recently the ext4 file system imposed passing absolute path with its file
name parameter.
As a result dfu_alt_info env variable has been modified to provide absolute
path when ext4 file system is accessed (e.g. /uImage ext4 0 2;).
Unfortunately, lthor flashing program provides plain file name (like uImage)
and hence those two file names do not match anymore.
Presented commit also allows lthor to write files to sub directories (like
/boot/bin/uImage).
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6sxsabresd board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core <---> board otg port
otg2 core <---> board host port
In order to make host port work, board_usb_phy_mode return USB_INIT_HOST
to make host port work in HOST mode.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6slevk board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core <---> board otg port
otg2 core <---> board host port
In order to make host port work, board_usb_phy_mode return USB_INIT_HOST
to let host port work in host mode.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
usb_phy_enable should return status bit, but not phy mode bit, thus
add a new function usb_phy_mode to query the PHY for it's mode and
make usb_phy_enable just return 0 but not 'phy_ctrl & USBPHY_CTRL_OTG_ID'.
Include a new board weak function board_usb_phy_mode. If board code
does not reimplement this function, it just call usb_phy_mode and return
usb_phy_mode's return value. The reason to include such a weak function
is: " SOC OTG core <--connect--> board HOST port, but no pin id for
the board host port, so board can not use usb_phy_mode to return the
phy mode, but define it's own rule."
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
Enable these boards mtdparts for nor flash:
p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
This converts all the Keymile powerpc boards to the generic board
initialization.
This includes the 3 Keymile powerpc subsystems: km82xx, km83xx,
and kmp204x.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The argument boot_flags of board_init_f() is not used at all in the
powerpc specific board.c init sequence. Now with the generic init
sequence, this boot_flags arg is used by board_init_f().
This patch sets the r3 register that is used to pass the boot_flags
argument from the start.S board_init_f() call to 0 prior to the function
call to avoid unknown content to end up in gd->flags.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
* fdt_fixup_mtdparts is called from ft_board_setup
* Run "mtdparts default" to create NAND partition on uboot
* Use mtdparts to create partitions dynamically rather
than using static partitions in device tree
Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
* fdt_fixup_mtdparts is called from ft_board_setup
* run "mtdparts default" to create NAND, NOR partition on uboot
* Use mtdparts to create partitions dynamically rather
than using static partitions in device tree
Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.
So use IFC acessor functions instead of in_be32().
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
-A_007662 states that for x1 link width, PCIe2 controller trains in
Gen1 speed while configured for Gen2 speed.
Workaround:Set the width to x1 and speed to Gen2 by writing to
CCSR registers in PBI phase
-A_008007 states that PVR register may show random value.
Workaround: Reset PVR register using DCSR space in PBI phase
Add PBI based software workaround for A_007662 and A_008007
in t104x_pbi.cfg. This is required for SPL-based bootloaders
like NAND-boot, SD-boot, SPI-boot
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This support of CPLD includes
- Files and register definitions
- Command to switch alternate bank
- Command to switch default bank
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
LIODN entry for B4860/B4420 mentions USB controller as "mph"
insread of "dr". This results in PAMU not permitting bus
transactions for USB DR controller on B4860 resulting in
USB function failure. Replacing "fsl-usb2-mph" with
"fsl-usb2-dr" allows USB DR controller bus transactions
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Sun Yusong-R58495 <yorksun@freescale.com>
NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure
on XAUI PHY, so set this bit definitely to align with the RM.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
1. use Payload length check disable when enable MAC;
2. add XGMII support for setting MAC interface mode;
3. only enable auto negotiation for Non-XGMII mode;
4. return 0xffff if clause 22 is used to read 10G phy_id;
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-By: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
