Commit Graph

8937 Commits

Author SHA1 Message Date
Olof Johansson
df3826262c TI: OMAP3: Overo Tobi ethernet support
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.

This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-13 06:17:38 -05:00
Olof Johansson
2a6cc97b91 SMC911X: Add chip auto detection
Refactor the smc911x driver to allow for detecting when the chip is missing.
I.e. the detect_chip() function is called earlier and will abort gracefully
when the Chip ID read returns all 1's.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-13 06:17:37 -05:00
Tom Rix
0297ec7e2a TI OMAP3 Use arm init sequence to initialize i2c
This changes fixes an early i2c error.

It appears that I2C is working because once a read or write
error is detected, the omap24xx_i2c driver calls i2c_init
inside its error handling check.

While it is ok to attempt error handling this way, the boards
must not depend on this side effect to initialize it's i2c.

Instead of explicitly calling i2c_init for every board, use
the generic arm initialization in lib_arm/board.c. By defining
the config variable CONFIG_HARD_I2C, the omap3 i2c initialization
is included in the init_sequence table.

Run tested on Beagle.
Compile tested on the omap3's

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-10-13 06:17:37 -05:00
Sandeep Paulraj
4df30f3bb7 TI: DaVinci DM365: Enabling network Support on DM365 EVM
This patch enables EMAC on the DM365 EVM.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:37 -05:00
Sandeep Paulraj
00e1665a3c TI: DaVinci: GPIO header file and definitions
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:37 -05:00
Sandeep Paulraj
95ae803afb TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:37 -05:00
Olof Johansson
fc9165fdb3 OMAP3: Clean up whitespace in mux configs
Switch from space-based indentation to tab-based in mux configs, as pointed
out by WD at:

http://lists.denx.de/pipermail/u-boot/2009-September/061241.html

Nothing but whitespace changes in this patch (diff -w gives no output).

Signed-off-by: Olof Johansson <olof@lixom.net>
2009-10-13 06:17:36 -05:00
Dirk Behme
9de0212bd7 OMAP3 MMC: Fix warning dereferencing type-punned pointer
Fix warning
Dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Steve Sakoman <sakoman@gmail.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:36 -05:00
Simon Kagstrom
e92daeb5c2 Support for the OpenRD base board
The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-13 06:17:36 -05:00
Prafulla Wadaskar
a62e78fc44 Kirkwood: mv88f6281gtw_ge: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on mv88f6281gtw_ge board.

To create Kirkwood boot image to be flashed on SPI Flash,
additional parameter u-boot.kwb need to be passed during make.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-13 06:17:36 -05:00
Prafulla Wadaskar
5bc7cbc15b Kirkwood: rd6281a: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on rd6281a platform.

To create Kirkwood boot image to be flashed on NAND,
additional parameter u-boot.kwb need to be passed during make.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-13 06:17:36 -05:00
Tom Rix
23b80982a0 Add support for Eukrea CPU9260/CPU9G20 SBC
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.

Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:35 -05:00
Tom Rix
d8380c9d35 Add support for Eukrea CPUAT91 SBC
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR
flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII
mode.

Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:35 -05:00
Sandeep Paulraj
eb95aa15e6 TI: DaVinci DM365: Minor config cleanup
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
This is already included when we include the
config_cmd_default.h header file. So this flag is removed.
Also another flag to enable NAND functions was being
enabled incorrectly.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-13 06:17:35 -05:00
Sandeep Paulraj
5d783c1ffd TI DaVinci DM365: Removing header file which does not exist
The DaVinci DM365 EVM board specific code was including a header file
which does not exist. So removing this header file.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-13 06:17:35 -05:00
Sandeep Paulraj
409ec37bd8 TI DaVinci: DM355: Config Cleanup and Update
This patch does the following
1) Enables the NAND driver which is now available.
2) Enables the 'CONFIG_MTD_DEVICE' as without this the
compilation will fail
3) We now have a safe place to store environment and defines
an offset where this can be stored. This offset value is such that it is after
the location where U-Boot is flashed using TI flash utilities.
4) Enables Bootdelay
5) Increases malloc() arena size. Manufacturers are coming out with
NAND with large blocks sizes of upto 1 MiB. It has been noticed that
as the block size of the NAND used is increased, if this particular
value is not increased, the NAND driver will output out of memory
errors.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-13 06:17:34 -05:00
Sandeep Paulraj
7908c97a10 TI DaVinci: DM646x: Initial Support for DM646x SOC
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-13 06:17:34 -05:00
Sandeep Paulraj
5d0f53624c TI DaVinci: DM6446: Fix Compilation error in NAND mode
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-13 06:17:33 -05:00
Tom Rix
7a2aa8b681 OMAP3 Move cache routine to cache.S
v7_flush_dcache_all, because it depends on omap ROM code is not
generic.  Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.

Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S.  This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.

The conversion from cache.c to cache.S was done most through
disassembling the uboot binary.  The only significant change was
to change the comparision for the return of get_cpu_rev from

   cmp	r0, #0
   beq	earlier_than_label

Which was lost information to

   cmp	r0, #CPU_3XX_ES20
   blt	earlier_than_label

The paths through the enable routine were verified by
adding an infinite loop and seeing the hang.  Then
removing the infinite loop and seeing it continue.

The disable routine is similar enough that it was not
tested with this method.

Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:33 -05:00
Sandeep Paulraj
a16df2c111 TI DaVinci: Remove references to SZ_xx
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-10-13 06:17:33 -05:00
Wolfgang Denk
14abfe361b Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-10-12 23:40:27 +02:00
Ed Swarthout
285870f753 Leave x86emu op code tables in default section
Forcing the tables into got2 caused extra relocation when using -mrelocatable.
This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Jin Zhengxiong <Jason.Jin@freescale.com>
2009-10-12 23:34:06 +02:00
Luigi 'Comio' Mantellini
be2254423b Update all board to support new bbmiiphy driver (with multibus support)
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-10 23:16:55 -07:00
Luigi 'Comio' Mantellini
310cecb8cc Add bb_miiphy_init call before any ethernet bring-up code.
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-10 23:16:53 -07:00
Luigi 'Comio' Mantellini
4ba31ab33a Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an arbitrary number of mii buses.
This feature is useful when your board uses different mii buses for different
phys and all (or a part) of these buses are implemented via bit-banging mode.

The driver requires that the following macros should be defined into the board
configuration file:

CONFIG_BITBANGMII       - Enable the miiphybb driver
CONFIG_BITBANGMII_MULTI - Enable the multi bus support

If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
to define at least the following macros:

MII_INIT      - Generic code to enable the MII bus (optional)
MDIO_DECLARE  - Declaration needed to access to the MDIO pin (optional)
MDIO_ACTIVE   - Activate the MDIO pin as out pin
MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
MDIO_READ     - Read the MDIO pin
MDIO(v)       - Write v on the MDIO pin
MDC_DECLARE   - Declaration needed to access to the MDC pin (optional)
MDC(v)        - Write v on the MDC pin

The previous macros make the driver compatible with the previous version
(that didn't support the multi-bus).

When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
the bb_miiphy_buses[] array with a record for each required bus and declare
the bb_miiphy_buses_num variable with the number of mii buses.
The record (struct bb_miiphy_bus) has the following fields/callbacks (see
miiphy.h for details):

char name[]            - The symbolic name that must be equal to the MII bus
                         registered name
int (*init)()          - Initialization function called at startup time (just
                         before the Ethernet initialization)
int (*mdio_active)()   - Activate the MDIO pin as output
int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
int (*set_mdio)()      - Write the MDIO pin
int (*get_mdio)()      - Read the MDIO pin
int (*set_mdc)()       - Write the MDC pin
int (*delay)()         - Delay function
void *priv             - Private data used by board specific code

The board code will look like:

struct bb_miiphy_bus bb_miiphy_buses[] = {
 { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... },
 { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... },
 ...
int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
                          sizeof(bb_miiphy_buses[0]);

Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-10 23:16:53 -07:00
Wolfgang Denk
cd77dd109c Merge branch 'reloc' 2009-10-09 00:03:18 +02:00
Joakim Tjernlund
afc3ba0fc4 relocation: Do not relocate NULL pointers.
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2009-10-08 09:33:36 +02:00
Peter Tyser
3beb40c247 85xx: Ensure BSS segment isn't linked at address 0
When U-Boot is relocated from flash to RAM pointers are modified
accordingly.  However, pointers initialzed with NULL values should not
be modified so that they maintain their intended NULL value.  If the
BSS segment is linked at address 0 its address will not be
updated as necessary during relocation.

This is a temporary workaround.  The end goal is to add support to
U-Boot to dynamically locate the BSS at an arbitrary address at
runtime.  When the ability to fixup the BSS inteligently is
added, this workaround can be removed and the 85xx link script
can put the BSS at a fixed address at link time.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-08 00:33:47 +02:00
Detlev Zundel
95c44ec485 tqm5200: Correct comment and code in post_hotkeys_pressed.
This fixes the code and the comment according to the original intent of
doing an intensive memory test when PSC6_3 is pulled low on the STK52xx.
Notably PORT_CONFIG will be overridden with this correct code now,
so beware.

The original code only worked by coincidence depending on the PORT_CONFIG
setting from the header file.  The new code was tested to ensure that the
(undocumented) memory test still works on the STK52x.

Signed-off-by: Detlev Zundel <dzu@denx.de>
CC: Martin Krause <Martin.Krause@tqs.de>

Minor white-space cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-08 00:31:23 +02:00
Wolfgang Denk
da01f53404 mpc512x: fix fixed_sdram() init code.
Commit 054197ba and later fixes used an array to initialize some of
the MDDRC parameters; however, the use of an array turned out to be a
bad idea as it was not possible to correlate structure entries to
array indices in readable and reliable way. Now we use a struct
instead, which makes this self-explanatory.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-08 00:23:12 +02:00
Niklaus Giger
dbcc357166 ppc4xx: respect 80-chars per line in ppc*.h files
After running checkstyle.pl on the three previous patches I noted that in
the *.h files there were a lot of long lines. This patch solves this problem.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:15:30 +02:00
Niklaus Giger
78d2a64137 ppc4xx: Rework cmd reginfo
The command "reginfo" got an overhaul for the ppc4xx. It dumps all the
relevant HW configuration registers (address, symbolic name, content).
This allows to easily detect errors in *.h files and changes in the HW
configuration.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:15:26 +02:00
Niklaus Giger
ddc922ff2c ppc_4xx: Apply new HW register names
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:15:20 +02:00
Niklaus Giger
f80e61dcfe ppc4xx: Cleanup some HW register names
Here you find all the changes in the include directory for new register names
and adapting other ones to the names used by AMCC in their manuals, e.g.
For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008
For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:15:13 +02:00
Stefan Roese
56f14818f6 ppc4xx: Add PPC405EX(r) Rev D support
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
405EX(r) parts. Here a list:

0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec

Since there are only a few older parts in the field, this patch now
changes the PVR's above to represent the new Rev D versions.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phong Vo" <pvo@amcc.com>
2009-10-07 09:14:27 +02:00
Stefan Roese
06dfaeef52 ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scan
This message is printed upon PCIe bus scan, not only upon error, but also
if no PCIe device is detected at all. Since this is not an error, let's
remove this message in this case. We already have the message
"link is not up." if there is no PCIe device present.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-10-07 09:13:46 +02:00
Mike Nuss
54f5f056aa PPC4xx: Denali core: Fix incorrect DDR row bits
The SPD detection code for the Denali memory controller used on some
ppc4xx
processors incorrectly encodes DDR0_42. With certain memory
configurations,
this can cause the bootwrapper to incorrectly calculate the installed
memory
size, because the number of row bits is wrong. This patch fixes that
encoding.

Signed-off-by: Mike Nuss <mike@terascala.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:10:11 +02:00
Ben Warren
99dbd4efd6 Add information about return values of xxx_eth_register() in documentation
As discussed on mailing list, <0 indicates failure, >=0 indicates number
of interfaces found.

Also added blurb about private data

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-05 00:02:51 -07:00
Mike Frysinger
1f1e774ec6 document network driver framework
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-04 23:03:06 -07:00
Prafulla Wadaskar
aba8237257 net: kirkwood_egiga.c: fixed build warning
if link up detection code is disabled through config option, it gives build warning.
This patch fixes the same

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-04 22:55:02 -07:00
Ben Warren
7194ab8095 Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI
added
Also:
  - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111
  - cleaned up line lengths
  - modified all boards that override weak function in this driver
  - modified all eeprom standalone apps to work with new driver
  - updated blackfin standalone EEPROM app after testing

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-04 22:37:03 -07:00
Prafulla Wadaskar
32e7f239dd net: phy: mv88e61xx.c : fixed build warning
following build warning was observed

mv88e61xx.c: In function ‘mv88e61xx_busychk’:
mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules

This patch fixes the same
Patch tested for rd6281a board build

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-04 22:30:46 -07:00
James Clough
c0b46d8ead net: Fix problem with 405EZ ethernet interrupt
On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the
UIC. We need to acknowledge the RX-/TX-interrupts in the
SDR0_ICINTSTAT reg as well.

This problem was introduced with commit
d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines]

Signed-off-by: James Clough <james@rtetc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-04 22:25:20 -07:00
Mike Frysinger
91b469c95f net: add random_port() prototype
The random_port() is meant to be used by other net code, but without a
prototype, we get fun warnings like:
dns.c: In function 'DnsSend':
dns.c:89: warning: implicit declaration of function 'random_port'

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-04 22:25:20 -07:00
Wolfgang Denk
311c19ccb5 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-10-03 23:40:35 +02:00
Wolfgang Denk
eb4bf4c077 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2009-10-03 23:38:55 +02:00
Peter Tyser
3469424cb6 ppc: Remove reloc_off field from global_data structure
Now that proper relocation is supported, the reloc_off field is no longer
necessary.

Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot.

We therefore increment XF_VERSION to 6

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 10:17:57 +02:00
Peter Tyser
0630535e2d arm/microblaze/nios/nios2/sh: Remove relocation fixups
These architectures don't need relocation fixups, so reduce their
codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS.

Also remove the reloc_off field from their global data structures
as it is no longer needed.

Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot. We will therefore increment XF_VERSION in the next commit,
which also touches this area.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 10:17:57 +02:00
Peter Tyser
521af04d85 Conditionally perform common relocation fixups
Add #ifdefs where necessary to not perform relocation fixups.  This
allows boards/architectures which support relocation to trim a decent
chunk of code.

Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:57 +02:00
Peter Tyser
3cbcfa70b1 p3mx: Remove serial relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:57 +02:00